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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-27 18:49:11 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-27 18:49:11 +0000 |
| commit | 9be7b0d485088e001e13e84b12fbd86c3c92167e (patch) | |
| tree | 0871698ad21800ae5b5018f8630c576e67845ebd /llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h | |
| parent | 10c7fb41874e8117f06e2dda0e234847526a695f (diff) | |
| download | bcm5719-llvm-9be7b0d485088e001e13e84b12fbd86c3c92167e.tar.gz bcm5719-llvm-9be7b0d485088e001e13e84b12fbd86c3c92167e.zip | |
AMDGPU: Add VOP3P instruction format
Add a few non-VOP3P but instructions related to packed.
Includes hack with dummy operands for the benefit of the assembler
llvm-svn: 296368
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h index ee5883a984e..d50665187e1 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h @@ -67,6 +67,7 @@ public: MCOperand decodeOperand_VS_32(unsigned Val) const; MCOperand decodeOperand_VS_64(unsigned Val) const; MCOperand decodeOperand_VSrc16(unsigned Val) const; + MCOperand decodeOperand_VSrcV216(unsigned Val) const; MCOperand decodeOperand_VReg_64(unsigned Val) const; MCOperand decodeOperand_VReg_96(unsigned Val) const; @@ -85,6 +86,7 @@ public: OPW64, OPW128, OPW16, + OPWV216, OPW_LAST_, OPW_FIRST_ = OPW32 }; |
