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bcm5719-llvm
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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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lib
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Target
/
AMDGPU
/
AMDGPUISelLowering.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
AMDGPU : Replace FMAD with FMA when denormals are enabled.
Wei Ding
2017-02-24
1
-0
/
+3
*
AMDGPU: Add cvt.pkrtz intrinsic
Matt Arsenault
2017-02-22
1
-0
/
+5
*
AMDGPU: Redefine clamp node as clamp 0.0-1.0
Matt Arsenault
2017-02-21
1
-0
/
+5
*
AMDGPU: Use source modifiers with f16->f32 conversions
Matt Arsenault
2017-02-02
1
-0
/
+1
*
AMDGPU: Cleanup fmin/fmax legacy function
Matt Arsenault
2017-02-01
1
-1
/
+1
*
AMDGPU: Check nsz instead of unsafe math
Matt Arsenault
2017-01-25
1
-1
/
+1
*
AMDGPU/R600: Serialize vector trunc stores to private AS
Jan Vesely
2017-01-20
1
-0
/
+1
*
AMDGPU: Disable some fneg combines unless nsz
Matt Arsenault
2017-01-19
1
-0
/
+10
*
AMDGPU: Fold fneg into fadd
Matt Arsenault
2017-01-12
1
-0
/
+1
*
AMDGPU/SI: Implement sendmsghalt intrinsic
Jan Vesely
2017-01-04
1
-0
/
+1
*
AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.*
Tom Stellard
2016-12-20
1
-0
/
+2
*
AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
Tom Stellard
2016-12-07
1
-0
/
+4
*
AMDGPU: Refactor exp instructions
Matt Arsenault
2016-12-05
1
-1
/
+3
*
[DAG Combiner] Fix the native computation of the Newton series for reciprocals
Evandro Menezes
2016-11-10
1
-3
/
+3
*
[AMDGPU] Check if type transforms to i16 (VI+) when getting AMDGPUISD::FFBH_U32
Konstantin Zhuravlyov
2016-11-01
1
-0
/
+7
*
AMDGPU: Implement expansion of f16 = FP_TO_FP16 f64
Tom Stellard
2016-11-01
1
-0
/
+1
*
[Target] remove TargetRecip class; 2nd try
Sanjay Patel
2016-10-20
1
-6
/
+4
*
revert r284495: [Target] remove TargetRecip class
Sanjay Patel
2016-10-18
1
-4
/
+6
*
[Target] remove TargetRecip class; move reciprocal estimate isel functionalit...
Sanjay Patel
2016-10-18
1
-6
/
+4
*
AMDGPU: Refactor kernel argument lowering
Tom Stellard
2016-09-16
1
-10
/
+2
*
AMDGPU: Improve splitting 64-bit bit ops by constants
Matt Arsenault
2016-09-14
1
-1
/
+4
*
AMDGPU/R600: Remove MergeVectorStores from legalization
Jan Vesely
2016-08-29
1
-3
/
+0
*
AMDGPU: Select mulhi 24-bit instructions
Matt Arsenault
2016-08-27
1
-2
/
+9
*
[X86] Heuristic to selectively build Newton-Raphson SQRT estimation
Nikolai Bozhenov
2016-08-04
1
-0
/
+3
*
AMDGPU : Add intrinsics for compare with the full wavefront result
Wei Ding
2016-07-28
1
-0
/
+3
*
AMDGPU: Add fp legacy instruction intrinsics
Matt Arsenault
2016-07-26
1
-0
/
+2
*
AMDGPU: Delete dead code
Matt Arsenault
2016-07-25
1
-1
/
+0
*
AMDGPU: Delete dead code
Matt Arsenault
2016-07-23
1
-4
/
+0
*
AMDGPU: Only use legal inline immediates with kill pseudo
Matt Arsenault
2016-07-19
1
-0
/
+1
*
AMDGPU: Add intrinsic for s_flbit_i32/v_ffbh_i32
Matt Arsenault
2016-07-18
1
-0
/
+1
*
AMDGPU: Remove dead code
Matt Arsenault
2016-07-14
1
-1
/
+0
*
AMDGPU: Expand unaligned accesses early
Matt Arsenault
2016-07-01
1
-1
/
+1
*
AMDGPU: Improve load/store of illegal types.
Matt Arsenault
2016-07-01
1
-1
/
+4
*
AMDGPU: Cleanup subtarget handling.
Matt Arsenault
2016-06-24
1
-1
/
+1
*
AMDGPU: Fix verifier errors in SILowerControlFlow
Matt Arsenault
2016-06-22
1
-1
/
+2
*
AMDGPU: Add implicitarg.ptr intrinsic.
Jan Vesely
2016-06-21
1
-2
/
+3
*
AMDGPU/SI: Refactor fixup handling for constant addrspace variables
Tom Stellard
2016-06-14
1
-0
/
+1
*
Revert "AMDGPU/SI: Refactor fixup handling for constant addrspace variables"
Tom Stellard
2016-06-14
1
-1
/
+0
*
AMDGPU/SI: Refactor fixup handling for constant addrspace variables
Tom Stellard
2016-06-14
1
-0
/
+1
*
Pass DebugLoc and SDLoc by const ref.
Benjamin Kramer
2016-06-12
1
-14
/
+8
*
AMDGPU: Remove custom load/store scalarization
Matt Arsenault
2016-04-14
1
-6
/
+0
*
AMDGPU: Add atomic_inc + atomic_dec intrinsics
Matt Arsenault
2016-04-12
1
-0
/
+2
*
AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2}
Tom Stellard
2016-04-01
1
-0
/
+1
*
AMDGPU: R600 code splitting cleanup
Matt Arsenault
2016-03-11
1
-8
/
+3
*
AMDGPU: Move function only used by R600
Matt Arsenault
2016-03-07
1
-1
/
+0
*
AMDGPU: Rename intrinsic to better match instruction name
Matt Arsenault
2016-02-13
1
-1
/
+1
*
AMDGPU: Split R600 and SI store lowering
Matt Arsenault
2016-02-11
1
-1
/
+0
*
AMDGPU: Split R600 and SI load lowering
Matt Arsenault
2016-02-10
1
-1
/
+0
*
AMDGPU: Match some med3 patterns
Matt Arsenault
2016-01-28
1
-0
/
+3
*
AMDGPU: Remove more unused intrinsics
Matt Arsenault
2016-01-23
1
-1
/
+0
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