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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-01 22:47:50 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-01 22:47:50 +0000 |
| commit | 327bb5ad82328bb92907bb2acf87e2282593e1e4 (patch) | |
| tree | 96f20ec1942050bdab64dc965a2f9f5e292994ce /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | |
| parent | 591ff8376bbf3ee0cc6f6006300878ae96475a49 (diff) | |
| download | bcm5719-llvm-327bb5ad82328bb92907bb2acf87e2282593e1e4.tar.gz bcm5719-llvm-327bb5ad82328bb92907bb2acf87e2282593e1e4.zip | |
AMDGPU: Improve load/store of illegal types.
There was a combine before to handle the simple copy case.
Split this into handling loads and stores separately.
We might want to change how this handles some of the vector
extloads, since this can result in large code size increases.
llvm-svn: 274394
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h index 4648438d856..b6bb47d204d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h @@ -66,6 +66,8 @@ protected: SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const; protected: + bool shouldCombineMemoryType(const MemSDNode *M) const; + SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; @@ -78,6 +80,7 @@ protected: static EVT getEquivalentMemType(LLVMContext &Context, EVT VT); static EVT getEquivalentLoadRegType(LLVMContext &Context, EVT VT); + static EVT getEquivalentBitType(LLVMContext &Context, EVT VT); virtual SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op, SelectionDAG &DAG) const; @@ -138,7 +141,7 @@ public: ISD::LoadExtType ExtType, EVT ExtVT) const override; - bool isLoadBitCastBeneficial(EVT, EVT) const override; + bool isLoadBitCastBeneficial(EVT, EVT) const final; bool storeOfVectorConstantIsCheap(EVT MemVT, unsigned NumElem, |
