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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-02 02:27:04 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-02 02:27:04 +0000 |
| commit | 9dba9bd4cfd4c23921d7dd65ade04d4b8dd9ac0e (patch) | |
| tree | a767760f7b8e6c3d41fc291938b66de6af5f4ac5 /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | |
| parent | 9dc3b5ff8954bee45fd8ed2e7de43de34f204944 (diff) | |
| download | bcm5719-llvm-9dba9bd4cfd4c23921d7dd65ade04d4b8dd9ac0e.tar.gz bcm5719-llvm-9dba9bd4cfd4c23921d7dd65ade04d4b8dd9ac0e.zip | |
AMDGPU: Use source modifiers with f16->f32 conversions
The operand types were defined to fit the fp16_to_fp node, which
has the half as an integer type. v_cvt_f32_f16 does support
source modifiers, so change this to have an FP type and modifiers.
For targets without legal f16, this requires recognizing the
bit operations and trying to produce them.
llvm-svn: 293857
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h index 880d571078b..58ac09f2698 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h @@ -85,6 +85,7 @@ protected: SDValue RHS, DAGCombinerInfo &DCI) const; SDValue performSelectCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performFNegCombine(SDNode *N, DAGCombinerInfo &DCI) const; + SDValue performFAbsCombine(SDNode *N, DAGCombinerInfo &DCI) const; static EVT getEquivalentMemType(LLVMContext &Context, EVT VT); |
