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path: root/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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* Pass Divergence Analysis data to Selection DAG to drive divergenceAlexander Timofeev2018-03-051-0/+96
* AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}Marek Olsak2018-01-311-0/+4
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-291-1/+1
* AMDGPU/SI: Add d16 support for image intrinsics.Changpeng Fang2018-01-181-0/+77
* [AMDGPU] add LDS f32 intrinsicsDaniil Fukalov2018-01-171-0/+3
* AMDGPU/SI: Add d16 support for buffer intrinsics.Changpeng Fang2018-01-121-0/+4
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-3/+3
* DAG: Add nuw when splitting loads and storesMatt Arsenault2017-11-291-9/+3
* [AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsicsVedran Miletic2017-11-271-0/+30
* AMDGPU: Implement computeKnownBitsForTargetNode for mbcntMatt Arsenault2017-11-131-0/+14
* AMDGPU: Drop duplicate setOperationActionJan Vesely2017-11-131-2/+0
* AMDGPU: Lower buffer store and atomic intrinsics manuallyMarek Olsak2017-11-091-0/+13
* AMDGPU: Remove redundant combineMatt Arsenault2017-11-071-38/+0
* AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32Matt Arsenault2017-11-061-9/+20
* AMDGPU : Fix an error for the llvm.cttz implementation.Wei Ding2017-10-171-3/+2
* AMDGPU: Implement isFPExtFoldableMatt Arsenault2017-10-131-0/+11
* Implement custom lowering for ISD::CTTZ_ZERO_UNDEF and ISD::CTTZ.Wei Ding2017-10-121-32/+68
* [AMDGPU] New 64 bit div/rem expansionStanislav Mekhanoshin2017-10-061-19/+151
* AMDGPU: Expand setcc for v2f32 and v4f32Konstantin Zhuravlyov2017-10-031-0/+1
* AMDGPU: Expand setcc for v2i32 and v4i32Konstantin Zhuravlyov2017-10-031-0/+1
* [AMDGPU] calling conventions for AMDPAL OS typeTim Renouf2017-09-291-0/+4
* AMDGPU: Allow coldcc callsMatt Arsenault2017-09-111-0/+2
* [AMDGPU] Prevent infinite recursion in DAG.computeKnownBits()Stanislav Mekhanoshin2017-09-011-2/+2
* AMDGPU: Turn int pack pattern into build_vectorMatt Arsenault2017-08-311-1/+11
* [AMDGPU] computeKnownBitsForTargetNode for 24 bit mulStanislav Mekhanoshin2017-08-281-1/+31
* AMDGPU: Start adding tail call supportMatt Arsenault2017-08-111-0/+37
* AMDGPU: Don't use report_fatal_error for unsupported call typesMatt Arsenault2017-08-031-3/+9
* AMDGPU: Pass special input registers to functionsMatt Arsenault2017-08-031-0/+43
* AMDGPU: Initial implementation of callsMatt Arsenault2017-08-011-0/+1
* fix typos in comments; NFCHiroshi Inoue2017-07-161-1/+1
* AMDGPU: Return correct type during argument loweringMatt Arsenault2017-07-151-0/+30
* Fix some more -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-2/+5
* [AMDGPU] Add intrinsics for tbuffer load and storeDavid Stuttard2017-06-221-0/+2
* AMDGPU: Cleanup CreateLiveInRegisterMatt Arsenault2017-06-191-7/+14
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [AMDGPU] Combine and (srl) into shl (bfe)Stanislav Mekhanoshin2017-05-231-1/+2
* [AMDGPU] Convert shl (add) into add (shl)Stanislav Mekhanoshin2017-05-231-2/+40
* [AMDGPU] Narrow lshl from 64 to 32 bit if possibleStanislav Mekhanoshin2017-05-221-11/+33
* AMDGPU: Start defining a calling conventionMatt Arsenault2017-05-171-28/+91
* [KnownBits] Add bit counting methods to KnownBits struct and use them where p...Craig Topper2017-05-121-1/+1
* AMDGPU: Pull fneg out of extract_vector_eltMatt Arsenault2017-05-111-1/+7
* [KnownBits] Add wrapper methods for setting and clear all bits in the underly...Craig Topper2017-05-051-1/+1
* AMDGPU: Add AMDGPU_HS calling conventionMarek Olsak2017-05-021-0/+1
* AMDGPU: Add new amdgcn.init.exec intrinsicsMarek Olsak2017-04-281-0/+2
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-15/+13
* AMDGPU: Move trap lowering to DAGMatt Arsenault2017-04-241-0/+1
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-2/+3
* Revert r300932 and r300930.Akira Hatanaka2017-04-211-3/+2
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-2/+3
* Revert "[AArch64] Improve code generation for logical instructions taking"Akira Hatanaka2017-04-201-3/+2
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