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path: root/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
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* [AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions.Sander de Smalen2018-04-161-3/+6
* [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+imm) store instructions.Sander de Smalen2018-04-131-1/+39
* [AArch64][SVE] Asm: Add support for parsing and printing SVE vector lists.Sander de Smalen2018-04-131-1/+7
* [AArch64][AsmParser] Unify 'addVectorListOperands' functions.Sander de Smalen2018-04-121-22/+18
* [AArch64][AsmParser] Make parse function for VectorLists generic to other vec...Sander de Smalen2018-04-121-55/+81
* [AArch64][AsmParser] Split index parsing from vector list.Sander de Smalen2018-04-111-27/+23
* [AArch64][AsmParser] Unify code for parsing Neon/SVE vectors.Sander de Smalen2018-04-111-143/+157
* AArch64: diagnose unpredictable store-exclusive instructionsTim Northover2018-04-101-0/+32
* [AArch64][SVE] Asm: Add support for SVE INDEX instructions.Sander de Smalen2018-04-101-0/+3
* [NFC] fix trivial typos in comments and error messageHiroshi Inoue2018-04-091-1/+1
* [AArch64] Add support for secrel add/load/store relocations for COFFMartin Storsjo2018-03-011-3/+11
* [AArch64][AsmParser] NFC: Generalize LogicalImm[Not](32|64) codeSander de Smalen2018-01-291-52/+17
* [AArch64][SVE] Asm: PTRUE and PTRUES instructionsSander de Smalen2018-01-221-2/+4
* [AArch64][SVE] Asm: Predicate patternsSander de Smalen2018-01-221-0/+56
* [AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructionsSander de Smalen2018-01-191-0/+3
* [AArch64][AsmParser] Cleanup isSImm7s4, isSImm7s8, (etc) functions.Sander de Smalen2018-01-151-39/+11
* [TableGen][AsmMatcherEmitter] Generate assembler checks for tied operandsSander de Smalen2018-01-101-0/+3
* Recommit r322073: [AArch64][SVE] Asm: Add predicated ADD/SUB instructionsSander de Smalen2018-01-091-1/+1
* [AArch64][SVE] Asm: Add parsing of merging/zeroing suffix for SVE predicate v...Sander de Smalen2018-01-091-0/+30
* [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.Sander de Smalen2018-01-031-0/+12
* [AArch64][AsmParser] Add isScalarReg() and repurpose isReg()Sander de Smalen2018-01-021-10/+14
* [AArch64][SVE] Re-submit patch series for ZIP1/ZIP2Sander de Smalen2017-12-201-7/+107
* [AArch64] Asm: Fix parsing of register aliases that have a name starting with...Sander de Smalen2017-12-201-19/+11
* Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turboReid Kleckner2017-12-181-110/+10
* [AArch64][SVE] Asm: Improve diagnostics further when +sve is not specifiedSander de Smalen2017-12-181-1/+4
* [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing supportSander de Smalen2017-12-181-9/+106
* AArch64: work around how Cyclone handles "movi.2d vD, #0".Tim Northover2017-12-181-0/+25
* Reverted r319315 because of unused functions (due to PPR not yet beingSander de Smalen2017-11-291-106/+9
* [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing supportSander de Smalen2017-11-291-9/+106
* [AArch64][SVE] Asm: Report SVE parsing diagnostics only onceSander de Smalen2017-11-151-25/+36
* [AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing supportFlorian Hahn2017-11-071-1/+161
* [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArch64AsmParser (NFC)Florian Hahn2017-11-071-43/+63
* [AsmParser][TableGen] Add VariantID argument to the generated mnemonic spell ...Craig Topper2017-10-261-1/+2
* [AsmParser][TableGen] Make the generated mnemonic spell checker function a fi...Craig Topper2017-10-261-1/+2
* [Asm] Add debug tracing in table-generated assembly matcherOliver Stannard2017-10-111-1/+1
* [AArch64] v8.3-a complex number supportSam Parker2017-08-311-0/+29
* [AArch64] Enable ARMv8.3-A pointer authenticationSam Parker2017-08-111-0/+18
* [AArch64] Assembler support for the ARMv8.2a dot product instructionsSjoerd Meijer2017-08-091-0/+2
* [TargetParser] Use enum classes for various ARM kind enums.Florian Hahn2017-07-271-2/+2
* [AArch64] Enable the mnemonic spell checkerSjoerd Meijer2017-07-131-7/+14
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* AArch64: diagnose unrecognized features in .cpu directive.Tim Northover2017-05-151-2/+17
* [Arch64AsmParser] better diagnostic for isbSjoerd Meijer2017-04-241-7/+5
* [AArch64] Fix handling of zero immediate in fmov instructionsJohn Brawn2017-04-201-19/+9
* [AArch64] Fix handling of integer fp immediatesJohn Brawn2017-04-201-22/+13
* [AArch64AsmParser] rewrite of function parseSysAliasSjoerd Meijer2017-03-031-212/+60
* AArch64AsmParser: don't try to parse “[1]” for non-vector register operandsSjoerd Meijer2017-02-271-25/+0
* AArch64AsmParser: tablegen the isBranchTarget helper functionsSjoerd Meijer2017-02-201-26/+4
* [AArch64] AArch64AsmParser clean up of isImmediate functions. NFCSjoerd Meijer2017-02-161-142/+6
* [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warni...Eugene Zelenko2017-01-061-18/+71
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