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path: root/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
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* [AArch64] Add option to enable/disable load-store renaming.Florian Hahn2020-02-101-0/+7
* [AArch64] Don't rename registers with pseudo defs in Ld/St opt.Florian Hahn2020-01-221-0/+13
* [AArch64] Respect reserved registers while renaming in LdSt opt.Florian Hahn2019-12-211-1/+4
* Add parentheses to silence warningBill Wendling2019-12-201-2/+2
* [AArch64] Enable clustering memory accesses to fixed stack objectsJay Foad2019-12-181-79/+16
* Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=Off builds after D65958 and...Fangrui Song2019-12-111-0/+2
* [AArch64] Be more careful to skip debug operands in LdSt Optimizier.Florian Hahn2019-12-111-7/+10
* [AArch64] Skip debug ops with regsOverlap in AArch64 LD/ST opt.Florian Hahn2019-12-111-1/+1
* [AArch64] Teach Load/Store optimizier to rename store operands for pairing.Florian Hahn2019-12-111-8/+322
* [MTE] Handle MTE instructions in AArch64LoadStoreOptimizer.Evgeniy Stepanov2019-09-201-32/+98
* [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-121-17/+17
* [AArch64] Remove scan-build "Value stored during its initialization is never ...Simon Pilgrim2019-05-081-4/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-4/+4
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-39/+40
* [CodeGen] Use RegUnits to track register aliases (NFC)Jun Bum Lim2018-04-271-43/+52
* [CodeGen] Add a new pass for PostRA sinkJun Bum Lim2018-03-221-36/+9
* [AArch64] Keep track of MIFlags in the LoadStoreOptimizerFrancis Visoiu Mistrih2018-03-141-7/+14
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-2/+2
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [AArch64] Refactor the loads and stores optimizerEvandro Menezes2017-11-151-143/+143
* [AArch64] Fix an assertion for pre-index generation with unscaled loads/stores.Chad Rosier2017-08-041-2/+17
* [AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-07-251-5/+5
* AArch64: remove all kill flags when extending register liveness.Tim Northover2017-06-261-1/+7
* [AArch64] Add early exit to promoteLoadFromStore.Florian Hahn2017-06-211-1/+4
* [AArch64] Preserve register flags when promoting a load from store.Florian Hahn2017-06-211-3/+4
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [AArch64] Use alias analysis in the load/store optimization pass.Chad Rosier2017-03-171-7/+14
* AArch64LoadStoreOptimizer: Correctly clear kill flagsMatthias Braun2017-02-171-2/+4
* [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko2017-01-251-9/+21
* AArch64LoadStoreOptimizer: Update kill flags when merging storesMatthias Braun2017-01-201-2/+23
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-11/+11
* [AArch64] Fix over-eager early-exit in load-store combinerNirav Dave2017-01-041-0/+3
* AArch64: Enable post-ra liveness updatesMatthias Braun2016-12-161-0/+3
* [AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a clobber.Geoff Berry2016-11-211-2/+4
* [AArch64] Update a FIXME comment to reflect current state. NFC.Chad Rosier2016-11-111-2/+4
* [AArch64] Enable merging of adjacent zero stores for all subtargets.Chad Rosier2016-11-111-2/+1
* [AArch64] Remove dead store. Found by gcc7.Davide Italiano2016-11-071-6/+3
* [AArch64] Removed the narrow load merging code in the ld/st optimizer.Chad Rosier2016-11-071-229/+42
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun2016-08-251-1/+1
* [AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired loa...Eli Friedman2016-08-121-1/+4
* [AArch64LoadStoreOpt] Handle offsets correctly for post-indexed paired loads.Eli Friedman2016-08-121-5/+5
* [AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.Geoff Berry2016-08-121-37/+3
* [AArch64] Load/store opt: Don't count transient instructions towards search l...Geoff Berry2016-07-211-15/+14
* [AArch64] Register AArch64LoadStoreOptimizer so it can be run by llc -run-pas...Geoff Berry2016-07-201-4/+0
* AArch64: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-155/+155
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-21/+21
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