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path: root/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
Commit message (Expand)AuthorAgeFilesLines
* [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-121-6/+6
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-2/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-3/+3
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* Remove redundant includes from lib/Target/AArch64.Michael Zolotukhin2017-12-131-1/+0
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
* [AArch64] Register passes so they can be run by llcDiana Picus2016-08-011-4/+0
* AArch64: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-26/+24
* Add optimization bisect opt-in calls for AArch64 passesAndrew Kaylor2016-04-251-0/+3
* [AArch64][AdvSIMDScalar] Update the kill flags correctly.Quentin Colombet2016-04-221-30/+45
* AArch64: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-131-1/+1
* [AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager.Chad Rosier2015-08-051-2/+13
* MachineInstr: Change return value of getOpcode() to unsigned.Matthias Braun2015-05-181-4/+4
* This only needs TargetInstrInfo, not the specialized one.Eric Christopher2015-01-301-3/+3
* Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.Eric Christopher2015-01-281-3/+1
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+3
* [AArch64] Extend the number of scalar instructions supported in the AdvSIMDChad Rosier2014-08-041-0/+6
* Run sort_includes.py on the AArch64 backend.Benjamin Kramer2014-07-251-1/+1
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+387
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