summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Expand)AuthorAgeFilesLines
...
* [TypePromotion] Use SetVectors instead of PtrSetsSam Parker2020-01-071-40/+30
* [DAGCombiner] reduce shuffle of concat of same vectorSanjay Patel2020-01-071-0/+24
* [ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPSSjoerd Meijer2020-01-071-2/+0
* GlobalISel: Implement lower for G_INTRINSIC_ROUNDMatt Arsenault2020-01-061-0/+29
* Don't rely on 'l'(ell) modifiers to indicate a label referenceBill Wendling2020-01-061-19/+16
* GlobalISel: Correct result type for G_FCMP in lowerFPTOUIMatt Arsenault2020-01-061-1/+3
* GlobalISel: Start adding computeNumSignBits to GISelKnownBitsMatt Arsenault2020-01-061-0/+70
* llc/MIR: Fix setFunctionAttributes for MIR functionsMatt Arsenault2020-01-061-17/+28
* [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCSCraig Topper2020-01-062-0/+86
* Fix "use of uninitialized variable" static analyzer warning. NFCI.Simon Pilgrim2020-01-061-1/+1
* [DAG] DAGCombiner::XformToShuffleWithZero - use APInt::extractBits helper. NFCI.Simon Pilgrim2020-01-061-8/+4
* [NFC] Fix trivial typos in commentsJames Henderson2020-01-064-4/+4
* [TargetLowering] Use SETCC input type to call getBooleanContents instead of t...Craig Topper2020-01-051-1/+1
* [DAGCombine] Don't check the legality of type when combine the SIGN_EXTEND_INREGQingShan Zhang2020-01-061-2/+3
* [LegalizeVectorOps][X86] Enable expansion of vector fp_to_uint in LegalizeVec...Craig Topper2020-01-041-1/+5
* [TargetLowering] In expandFP_TO_UINT, add proper extend or truncate for the c...Craig Topper2020-01-041-0/+4
* [LegalizeVectorOps] Split most of ExpandStrictFPOp into a separate UnrollStri...Craig Topper2020-01-041-6/+13
* GlobalISel: Scalarize all division operationsMatt Arsenault2020-01-041-0/+3
* Revert "[SCEV] Move ScalarEvolutionExpander.cpp to Transforms/Utils (NFC)."Florian Hahn2020-01-041-1/+1
* [SCEV] Move ScalarEvolutionExpander.cpp to Transforms/Utils (NFC).Florian Hahn2020-01-041-1/+1
* GlobalISel: Define G_READCYCLECOUNTERMatt Arsenault2020-01-041-0/+2
* [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits ...Simon Pilgrim2020-01-041-0/+11
* GlobalISel: Add type argument to getRegBankFromRegClassMatt Arsenault2020-01-031-7/+13
* [DAGCombiner] fix miscompile in translating (X & undef) to shuffleSanjay Patel2020-01-031-1/+3
* [LegalizeVectorOps] Pass the post-UpdateNodeOperands version of Op to ExpandL...Craig Topper2020-01-031-11/+14
* Move tail call disabling code to target independent codeReid Kleckner2020-01-034-8/+28
* [DAGCombiner][X86][AArch64] Generalize `A-(A&B)`->`A&(~B)` fold (PR44448)Roman Lebedev2020-01-031-20/+9
* [DAGCombiner] `~(add X, -1)` -> `neg X` foldRoman Lebedev2020-01-031-0/+7
* [DAGCombine][X86][Thumb2/LowOverheadLoops] `A - (A & C)` -> `A & (~C)` fold (...Roman Lebedev2020-01-031-0/+10
* [NFC][DAGCombine] Clarify comment for 'A - (A & (B - 1))' foldRoman Lebedev2020-01-031-1/+1
* Fix typo "psuedo" in commentsJay Foad2020-01-031-1/+1
* [DAGCombine][X86][AArch64] 'A - (A & (B - 1))' -> 'A & (0 - B)' fold (PR44448)Roman Lebedev2020-01-031-0/+15
* [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG fo...QingShan Zhang2020-01-031-0/+1
* DAG: Use TargetConstant for FENCE operandsMatt Arsenault2020-01-021-4/+4
* [SelectionDAG] Simplify SelectionDAGBuilder::visitInlineAsmFangrui Song2020-01-021-3/+1
* [FPEnv] Default NoFPExcept SDNodeFlag to falseUlrich Weigand2020-01-025-10/+49
* [NFC] Add explicit instantiation to releaseNodeQiu Chaofan2020-01-021-0/+5
* [RegisterClassInfo] Use SmallVector::assign instead of resize to make sure we...Craig Topper2020-01-011-1/+1
* [MachineScheduler] improve reuse of 'releaseNode'methodLorenzo Casalino2020-01-011-17/+21
* [NFC] Fixes -Wrange-loop-analysis warningsMark de Wever2020-01-015-10/+10
* DAG: Stop trying to fold FP -(x-y) -> y-x in getNode with nszMatt Arsenault2019-12-312-5/+10
* [LegalizeVectorOps][AArch64] Stop asking for v4f16 fp_round and fp_extend to ...Craig Topper2019-12-311-0/+5
* [ARM][TypePromotion] Re-enable by defaultSam Parker2019-12-311-1/+1
* [TargetLowering][AMDGPU] Make scalarizeVectorLoad return a pair of SDValues i...Craig Topper2019-12-302-16/+6
* Ignore "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" in favor ...Fangrui Song2019-12-301-13/+1
* [MIPS GlobalISel] Select bitreverse. RecommitPetar Avramovic2019-12-301-1/+46
* GlobalISel: moreElementsVector for FP min/maxMatt Arsenault2019-12-301-1/+7
* Revert "[MIPS GlobalISel] Select bitreverse"Dmitri Gribenko2019-12-301-45/+1
* [MIPS GlobalISel] Select bitreversePetar Avramovic2019-12-301-1/+45
* [MIPS GlobalISel] Select bswapPetar Avramovic2019-12-301-0/+58
OpenPOWER on IntegriCloud