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* [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() ISD:...Simon Pilgrim2020-01-131-0/+3
* [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/...Simon Pilgrim2020-01-131-0/+11
* [DWARF5][DebugInfo]: Added support for DebugInfo generation for auto return t...Awanish Pandey2020-01-131-0/+8
* __patchable_function_entries: don't use linkage field 'unique' with -no-integ...Fangrui Song2020-01-121-18/+21
* [NFC] Refactor memory ops cluster methodQiu Chaofan2020-01-121-14/+7
* [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT legali...Craig Topper2020-01-111-3/+6
* [TargetLowering][X86] Connect the chain from STRICT_FSETCC in TargetLowering:...Craig Topper2020-01-111-3/+5
* [LegalizeVectorOps] Expand vector MERGE_VALUES immediately.Craig Topper2020-01-111-0/+11
* [LegalizeVectorOps] Remove some of the simpler Expand methods. Pass Results v...Craig Topper2020-01-111-125/+77
* [LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the Expand* a...Craig Topper2020-01-111-251/+251
* moveOperands - assert Src/Dst MachineOperands are non-null.Simon Pilgrim2020-01-111-1/+1
* [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare from R...Craig Topper2020-01-102-10/+3
* Let targets adjust operand latency of bundlesStanislav Mekhanoshin2020-01-101-1/+6
* [TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call to get...Craig Topper2020-01-101-8/+4
* [TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to avoi...Craig Topper2020-01-101-10/+9
* [LegalizeVectorOps] Improve handling of multi-result operations.Craig Topper2020-01-101-173/+271
* [AArch64] Add function attribute "patchable-function-entry" to add NOPs at fu...Fangrui Song2020-01-102-2/+46
* [FPEnv] Invert sense of MIFlag::FPExcept flagUlrich Weigand2020-01-106-11/+11
* Fix Wdocumentation warning. NFCI.Simon Pilgrim2020-01-101-2/+0
* [MIR] Fix cyclic dependency of MIR formatterPeng Guo2020-01-105-20/+17
* GlobalISel: Handle llvm.read_registerMatt Arsenault2020-01-092-0/+28
* DAG: Don't use unchecked dyn_castMatt Arsenault2020-01-091-4/+4
* GlobalISel: Fix else after returnMatt Arsenault2020-01-091-3/+9
* CodeGen: Use LLT instead of EVT in getRegisterByNameMatt Arsenault2020-01-091-3/+9
* GlobalISel: Move getLLTForMVT/getMVTForLLTMatt Arsenault2020-01-092-17/+17
* GlobalISel: Don't assert on MoreElements creating vectorsMatt Arsenault2020-01-091-5/+7
* [TargetLowering][X86] TeachSimplifyDemandedBits to handle cases where only th...Craig Topper2020-01-091-0/+21
* [DAGCombiner] reduce extract subvector of concatSanjay Patel2020-01-091-2/+16
* Revert "[ARM][LowOverheadLoops] Update liveness info"Sam Parker2020-01-091-13/+0
* [ARM][LowOverheadLoops] Update liveness infoSam Parker2020-01-091-0/+13
* [DAGCombine] Fold the (fma -x, y, -z) to -(fma x, y, z)QingShan Zhang2020-01-091-0/+9
* Revert "Revert "[MIR] Target specific MIR formating and parsing""Daniel Sanders2020-01-087-116/+257
* Revert "[MIR] Target specific MIR formating and parsing"Nico Weber2020-01-087-256/+116
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-087-116/+256
* Revert "[MIR] Target specific MIR formating and parsing"Daniel Sanders2020-01-087-256/+116
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-087-116/+256
* Recommit "[MachineVerifier] Improve verification of live-in lists."Jonas Paulsson2020-01-081-0/+26
* Revert "Merge memtag instructions with adjacent stack slots."Evgenii Stepanov2020-01-081-4/+0
* Merge memtag instructions with adjacent stack slots.Evgenii Stepanov2020-01-081-0/+4
* [SelectionDAG] Use llvm::Optional<APInt> for FoldValue.Simon Pilgrim2020-01-081-32/+30
* [DAGCombiner] clean up extract-of-concat fold; NFCSanjay Patel2020-01-081-13/+21
* [Intrinsic] Add fixed point division intrinsics.Bevin Hansson2020-01-089-23/+285
* [NFC] Move InPQueue into arguments of releaseNodeQiu Chaofan2020-01-081-8/+3
* [Dsymutil][Debuginfo][NFC] Reland: Refactor dsymutil to separate DWARF optimi...Alexey Lapshin2020-01-081-1/+1
* [X86] Adding fp128 support for strict fcmpWang, Pengfei2020-01-082-20/+58
* [AArch64][GlobalISel] Fold a chain of two G_PTR_ADDs of constant offsets.Amara Emerson2020-01-071-0/+46
* Revert "Allow output constraints on "asm goto""Bill Wendling2020-01-073-50/+13
* Allow output constraints on "asm goto"Bill Wendling2020-01-073-13/+50
* [MachineOutliner][AArch64] Save + restore LR in noreturn functionsJessica Paquette2020-01-071-6/+0
* [AIX][XCOFF]Implement mergeable constdiggerlin2020-01-071-1/+1
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