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| author | Sanjay Patel <spatel@rotateright.com> | 2020-01-03 14:57:35 -0500 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2020-01-03 14:58:49 -0500 |
| commit | ca7fdd41bda02a24c401ecf75d306cea93c27fb5 (patch) | |
| tree | 68a7a5a9fddc2e9739d54256d34a618ccc0ef099 /llvm/lib/CodeGen | |
| parent | 7cdc60c3db1ed96f3d976ad913709c6c83776f3b (diff) | |
| download | bcm5719-llvm-ca7fdd41bda02a24c401ecf75d306cea93c27fb5.tar.gz bcm5719-llvm-ca7fdd41bda02a24c401ecf75d306cea93c27fb5.zip | |
[DAGCombiner] fix miscompile in translating (X & undef) to shuffle
See PR42982 for more context:
https://bugs.llvm.org/show_bug.cgi?id=42982
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3bfea38932f..d401e7fb657 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -19769,8 +19769,10 @@ SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) { int EltIdx = i / Split; int SubIdx = i % Split; SDValue Elt = RHS.getOperand(EltIdx); + // X & undef --> 0 (not undef). So this lane must be converted to choose + // from the zero constant vector (same as if the element had all 0-bits). if (Elt.isUndef()) { - Indices.push_back(-1); + Indices.push_back(i + NumSubElts); continue; } |

