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path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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* [SDAG] Support vector UMULO/SMULONikita Popov2019-02-201-16/+24
* [SelectionDAG] Extract [US]MULO expansion into TL method; NFCNikita Popov2019-02-171-1/+121
* [X86] Fix LowerAsmOutputForConstraint.Nirav Dave2019-02-151-1/+1
* Fix 80-column limit in SimplifyDemandedBits/SimplifyDemandedVectorElts. NFCI.Simon Pilgrim2019-02-151-70/+78
* [CallSite removal] Migrate the statepoint GC infrastructure to use theChandler Carruth2019-02-111-12/+12
* [CodeGen][X86] Don't scalarize vector saturating add/subNikita Popov2019-02-101-15/+6
* [TargetLowering] refactor setcc folds to fix another miscompile (PR40657)Sanjay Patel2019-02-101-55/+55
* [TargetLowering] add tests to show effect of setcc sub->shift; NFCSanjay Patel2019-02-091-1/+0
* [TargetLowering] avoid miscompile in setcc transform (PR40657)Sanjay Patel2019-02-091-1/+3
* Revert "[SelectionDAG] Extract [US]MULO expansion into TL method; NFC"Nikita Popov2019-02-091-109/+0
* [SelectionDAG] Extract [US]MULO expansion into TL method; NFCNikita Popov2019-02-091-0/+109
* Implementation of asm-goto support in LLVMCraig Topper2019-02-081-1/+5
* [TargetLowering] Use ISD::FSHR in expandFixedPointMulSimon Pilgrim2019-02-081-5/+2
* [TargetLowering] Add SimplifyDemandedBits funnel shift support Simon Pilgrim2019-02-081-0/+39
* [InlineAsm][X86] Add backend support for X86 flag output parameters.Nirav Dave2019-02-061-0/+6
* [Intrinsic] Unsigned Fixed Point Multiplication IntrinsicLeonard Chan2019-02-041-9/+21
* [TargetLowering] try harder to determine undef elements of vector binopsSanjay Patel2019-02-011-7/+61
* [Intrinsic] Expand SMULFIX to MUL, MULH[US], or [US]MUL_LOHI on vector argumentsLeonard Chan2019-01-311-14/+12
* Adjust documentation for git migration.James Y Knight2019-01-291-1/+1
* [CodeGen][X86] Expand UADDSAT to NOT+UMIN+ADDNikita Popov2019-01-281-0/+6
* [TargetLowering] Rename getExpandedFixedPointMultiplication to expandFixedPoi...Simon Pilgrim2019-01-241-2/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-151-4/+16
* Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-141-16/+4
* [CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectorsNikita Popov2019-01-141-4/+16
* [X86] Rename overly verbose method; NFCNikita Popov2019-01-131-2/+1
* Use getShiftAmountTy for shift amounts.Simon Pilgrim2019-01-121-1/+2
* [X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim2019-01-121-0/+20
* Remove check for single use in ShrinkDemandedConstantStanislav Mekhanoshin2019-01-091-3/+0
* [TargetLowering][AMDGPU] Remove the SimplifyDemandedBits function that takes ...Craig Topper2019-01-071-50/+0
* Added single use check to ShrinkDemandedConstantStanislav Mekhanoshin2019-01-051-0/+3
* [SelectionDAG] Always use the version of computeKnownBits that returns a valu...Simon Pilgrim2018-12-211-5/+4
* [TargetLowering] Fix propagation of undefs in zero extension ops (PR40091)Simon Pilgrim2018-12-191-0/+14
* [TargetLowering] Fallback from SimplifyDemandedVectorElts to SimplifyDemanded...Simon Pilgrim2018-12-181-1/+8
* NFC: remove unused variableJF Bastien2018-12-171-1/+0
* [TargetLowering] Add DemandedElts mask to SimplifyDemandedBits (PR40000)Simon Pilgrim2018-12-171-42/+120
* [TargetLowering] Add ISD::OR + ISD::XOR handling to SimplifyDemandedVectorEltsSimon Pilgrim2018-12-151-0/+2
* [TargetLowering] Add ISD::ROTL/ROTR vector expansionSimon Pilgrim2018-12-131-0/+45
* [TargetLowering] Add ISD::AND handling to SimplifyDemandedVectorEltsSimon Pilgrim2018-12-121-0/+16
* [Intrinsic] Signed Fixed Point Multiplication IntrinsicLeonard Chan2018-12-121-5/+70
* [TargetLowering] Add ISD::EXTRACT_VECTOR_ELT support to SimplifyDemandedBitsSimon Pilgrim2018-12-111-0/+19
* [TargetLowering] Add UNDEF folding to SimplifyDemandedVectorEltsSimon Pilgrim2018-12-101-1/+6
* [TargetLowering] Remove ISD::ANY_EXTEND/ANY_EXTEND_VECTOR_INREG opcodes from ...Simon Pilgrim2018-12-051-2/+0
* [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim2018-12-051-0/+48
* [TargetLowering] SimplifyDemandedVectorElts - don't alter DemandedElts maskSimon Pilgrim2018-12-051-2/+3
* [SelectionDAG] Redefine isGAPlusOffset in terms of unwrapAddress. NFCI.Nirav Dave2018-12-041-1/+4
* [TargetLowering] expandFP_TO_UINT - avoid FPE due to out of range conversion ...Simon Pilgrim2018-12-041-11/+30
* [TargetLowering] Add SimplifyDemandedVectorElts support to EXTEND opcodesSimon Pilgrim2018-12-041-0/+17
* [SelectionDAG] Improve SimplifyDemandedBits to SimplifyDemandedVectorElts sim...Simon Pilgrim2018-12-011-5/+3
* [TargetLowering] SimplifyDemandedBits - only reduce known bits for integer co...Simon Pilgrim2018-11-211-1/+3
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