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authorSanjay Patel <spatel@rotateright.com>2019-02-09 15:59:02 +0000
committerSanjay Patel <spatel@rotateright.com>2019-02-09 15:59:02 +0000
commit887ac1b38ce273cd70dda4ee184d974f3094da52 (patch)
tree2efc676a7ace635eb0e8de65c7fea2295bfdc0f2 /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
parent6404af86466cd2a2db84779769e070b5c7784725 (diff)
downloadbcm5719-llvm-887ac1b38ce273cd70dda4ee184d974f3094da52.tar.gz
bcm5719-llvm-887ac1b38ce273cd70dda4ee184d974f3094da52.zip
[TargetLowering] avoid miscompile in setcc transform (PR40657)
llvm-svn: 353615
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 484dbffefbb..b933f032409 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3074,7 +3074,9 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
return DAG.getSetCC(dl, VT, N0.getOperand(0),
DAG.getConstant(0, dl, N0.getValueType()),
Cond);
- if (N0.getNode()->hasOneUse()) {
+ // The shift is not valid if this is a bool (i1).
+ // TODO: This transform needs evidence to justify its existence.
+ if (N0.getNode()->hasOneUse() && OpVT.getScalarSizeInBits() != 1) {
assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
auto &DL = DAG.getDataLayout();
// (Z-X) == X --> Z == X<<1
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