| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | flags -> glue for selectiondag | Chris Lattner | 2010-12-23 | 1 | -6/+6 |
| * | Reorganize ListScheduleBottomUp in preparation for modeling machine cycles an... | Andrew Trick | 2010-12-23 | 1 | -130/+153 |
| * | Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows m... | Andrew Trick | 2010-12-23 | 1 | -17/+18 |
| * | In CheckForLiveRegDef use TRI->getOverlaps. | Andrew Trick | 2010-12-23 | 1 | -6/+9 |
| * | Fixes PR8823: add-with-overflow-128.ll | Andrew Trick | 2010-12-23 | 1 | -12/+33 |
| * | In DelayForLiveRegsBottomUp, handle instructions that read and write | Andrew Trick | 2010-12-21 | 1 | -15/+4 |
| * | whitespace | Andrew Trick | 2010-12-21 | 1 | -42/+42 |
| * | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner | 2010-12-21 | 1 | -5/+5 |
| * | Fix a bug in the scheduler's handling of "unspillable" vregs. | Chris Lattner | 2010-12-20 | 1 | -1/+14 |
| * | the result of CheckForLiveRegDef is dead, remove it. | Chris Lattner | 2010-12-20 | 1 | -12/+8 |
| * | Two sets of changes. Sorry they are intermingled. | Evan Cheng | 2010-11-03 | 1 | -0/+8 |
| * | Avoiding overly aggressive latency scheduling. If the two nodes share an | Evan Cheng | 2010-10-29 | 1 | -24/+69 |
| * | The "excess register pressure" returned by HighRegPressure() is not accurate ... | Evan Cheng | 2010-07-26 | 1 | -41/+20 |
| * | Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parame... | Duncan Sands | 2010-07-26 | 1 | -1/+2 |
| * | Add comments. | Evan Cheng | 2010-07-25 | 1 | -4/+16 |
| * | Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on | Bob Wilson | 2010-07-25 | 1 | -2/+2 |
| * | Add an ILP scheduler. This is a register pressure aware scheduler that's | Evan Cheng | 2010-07-24 | 1 | -10/+72 |
| * | - Allow target to specify when is register pressure "too high". In most cases, | Evan Cheng | 2010-07-23 | 1 | -56/+124 |
| * | Re-apply r109079 with fix. | Evan Cheng | 2010-07-22 | 1 | -28/+26 |
| * | Revert r109079, which broke a lot of CodeGen tests. | Owen Anderson | 2010-07-22 | 1 | -25/+27 |
| * | Initialize RegLimit only when register pressure is being tracked. | Evan Cheng | 2010-07-22 | 1 | -27/+25 |
| * | More register pressure aware scheduling work. | Evan Cheng | 2010-07-21 | 1 | -81/+84 |
| * | Teach bottom up pre-ra scheduler to track register pressure. Work in progress. | Evan Cheng | 2010-07-21 | 1 | -15/+229 |
| * | Add a VT argument to getMinimalPhysRegClass and replace the copy related uses | Rafael Espindola | 2010-06-29 | 1 | -1/+1 |
| * | Use `llvm::next' instead of `next' to make VC++ 2010 happy. | Oscar Fuentes | 2010-05-30 | 1 | -1/+1 |
| * | Fix some latency computation bugs: if the use is not a machine opcode do not ... | Evan Cheng | 2010-05-28 | 1 | -1/+12 |
| * | Eliminate the use of PriorityQueue and just use a std::vector, | Dan Gohman | 2010-05-26 | 1 | -7/+18 |
| * | Delete an unused function. | Dan Gohman | 2010-05-26 | 1 | -2/+0 |
| * | Change push_all to a non-virtual function and implement it in the | Dan Gohman | 2010-05-26 | 1 | -5/+0 |
| * | Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid. | Evan Cheng | 2010-05-21 | 1 | -1/+1 |
| * | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng | 2010-05-20 | 1 | -2/+4 |
| * | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng | 2010-05-20 | 1 | -25/+92 |
| * | Three changes: | Chris Lattner | 2010-04-07 | 1 | -5/+7 |
| * | move target-independent opcodes out of TargetInstrInfo | Chris Lattner | 2010-02-09 | 1 | -7/+7 |
| * | When the scheduler unfold a load folding instruction it move some of the pred... | Evan Cheng | 2010-02-05 | 1 | -2/+10 |
| * | Remove the '-disable-scheduling' flag and replace it with the 'source' option of | Bill Wendling | 2010-01-23 | 1 | -14/+56 |
| * | The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 ... | Bill Wendling | 2010-01-06 | 1 | -2/+2 |
| * | Only check the ordering if there is an ordering for each nodes. | Bill Wendling | 2010-01-06 | 1 | -2/+2 |
| * | Add a semi-primitive form of scheduling via the "SDNode ordering" to the | Bill Wendling | 2010-01-05 | 1 | -0/+12 |
| * | Change errs() to dbgs(). | David Greene | 2010-01-05 | 1 | -14/+14 |
| * | Remove includes of Support/Compiler.h that are no longer needed after the | Nick Lewycky | 2009-10-25 | 1 | -1/+0 |
| * | Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. | Nick Lewycky | 2009-10-25 | 1 | -3/+2 |
| * | The ScheduleDAG framework now requires an AliasAnalysis argument, though | Dan Gohman | 2009-10-09 | 1 | -1/+1 |
| * | Silence comparison always false warning in -Asserts mode. | Reid Kleckner | 2009-09-30 | 1 | -4/+4 |
| * | Fix integer overflow in instruction scheduling. This can happen if we have | Reid Kleckner | 2009-09-30 | 1 | -4/+5 |
| * | eliminate uses of cerr() | Chris Lattner | 2009-08-23 | 1 | -4/+4 |
| * | remove a few DOUTs here and there. | Chris Lattner | 2009-08-23 | 1 | -15/+16 |
| * | Split EVT into MVT and EVT, the former representing _just_ a primitive type, ... | Owen Anderson | 2009-08-11 | 1 | -5/+5 |
| * | Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ... | Owen Anderson | 2009-08-10 | 1 | -10/+10 |
| * | llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. | Torok Edwin | 2009-07-14 | 1 | -2/+2 |
