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path: root/llvm/lib/CodeGen/MachineVerifier.cpp
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* [machineverifier] Detect PHI's that are preceeded by non-PHI'sDaniel Sanders2018-10-031-3/+11
* [globalisel][verifier] Run the MachineVerifier from IRTranslator onwardsDaniel Sanders2018-10-021-0/+7
* [MachineVerifier] Relax checkLivenessAtDef regarding dead subreg defsBjorn Pettersson2018-09-201-21/+11
* MachineVerifier: Fix assert on implicit virtreg useMatt Arsenault2018-08-271-2/+4
* [MachineVerifier] Check if predecessor is jointly dominated by undefsKrzysztof Parzyszek2018-08-161-1/+11
* Remove trailing spaceFangrui Song2018-07-301-2/+2
* [CodeGen] Fix inconsistent declaration parameter nameFangrui Song2018-07-161-3/+3
* [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug propertyMikael Holmen2018-06-211-0/+4
* [WebAssembly] Add Wasm personality and isScopedEHPersonality()Heejin Ahn2018-05-171-1/+1
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-1/+1
* [MachineVerifier][GlobalISel] Verifying generic extends and truncatesRoman Tereshin2018-05-081-0/+52
* [MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all v...Roman Tereshin2018-05-071-4/+14
* [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visi...Roman Tereshin2018-05-071-20/+21
* [GlobalISel] Print/Parse FailedISel MachineFunction propertyRoman Tereshin2018-02-281-5/+9
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-7/+3
* [GISel]: Verify COPIES involving generic registers.Aditya Nandakumar2018-02-091-0/+30
* [MachineVerifier] Add check that renamable operands aren't reserved registers.Geoff Berry2018-01-291-6/+8
* LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFCMatthias Braun2017-12-181-1/+1
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-2/+2
* Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun2017-12-131-1/+1
* [MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry2017-12-121-0/+8
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-1/+1
* MachineVerifier: undef phi arg doesn't need to be live-out from predecessorMatthias Braun2017-12-041-1/+2
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-24/+23
* [CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih2017-11-301-5/+5
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-1/+1
* [CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih2017-11-281-6/+6
* MachineVerifier: Improve register operand checksMatthias Braun2017-11-281-78/+81
* MachineVerifier: Improve PHI operand checkingMatthias Braun2017-11-281-28/+54
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-3/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-2/+4
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-4/+2
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-09-111-30/+60
* LiveIntervalAnalysis: Fix alias regunit reserved definitionMatthias Braun2017-09-011-0/+2
* [GISEl]: Translate phi into G_PHIAditya Nandakumar2017-08-231-0/+17
* [MachineVerifier] Add check that tied physregs aren't different.Mikael Holmen2017-07-061-0/+8
* RegAllocPBQP: Do not assign reserved physical registerMatthias Braun2017-06-081-4/+5
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* Verify a couple more fields in STATEPOINT instructionsPhilip Reames2017-06-021-0/+14
* Add placeholder for more extensive verification of psuedo opsPhilip Reames2017-06-021-8/+21
* MachineVerifier: Remove unused set; NFCMatthias Braun2017-05-261-5/+0
* BitVector: add iterators for set bitsFrancis Visoiu Mistrih2017-05-171-1/+1
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-2/+2
* ARM: Compute MaxCallFrame size earlyMatthias Braun2017-05-051-3/+5
* Do not run frame verification if target does not use frame instructionsSerge Pavlov2017-04-201-0/+2
* Use methods to access data stored with frame instructionsSerge Pavlov2017-04-131-11/+2
* MIR: Allow parsing of empty machine functionsJustin Bogner2017-04-111-2/+4
* [MachineVerifier] Drop a spurious constSven van Haastregt2017-03-291-1/+1
* [MachineVerifier] Avoid reference to nullptrSven van Haastregt2017-03-291-2/+2
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