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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-30 16:12:24 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-30 16:12:24 +0000 |
| commit | c71cced0aae46ab4f27e2ea755819f308661670b (patch) | |
| tree | e63f1794dd2fed8bf926665dc8aa53abc7e13048 /llvm/lib/CodeGen/MachineVerifier.cpp | |
| parent | 0cdf7fdc48fd024a55df2afd773d0f7359a79736 (diff) | |
| download | bcm5719-llvm-c71cced0aae46ab4f27e2ea755819f308661670b.tar.gz bcm5719-llvm-c71cced0aae46ab4f27e2ea755819f308661670b.zip | |
[CodeGen] Always use `printReg` to print registers in both MIR and debug
output
As part of the unification of the debug format and the MIR format,
always use `printReg` to print all kinds of registers.
Updated the tests using '_' instead of '%noreg' until we decide which
one we want to be the default one.
Differential Revision: https://reviews.llvm.org/D40421
llvm-svn: 319445
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 83a9e1a58c0..2d138298a94 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1097,8 +1097,8 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { TII->getRegClass(MCID, MONum, TRI, *MF)) { if (!DRC->contains(Reg)) { report("Illegal physical register for instruction", MO, MONum); - errs() << TRI->getName(Reg) << " is not a " - << TRI->getRegClassName(DRC) << " register.\n"; + errs() << printReg(Reg, TRI) << " is not a " + << TRI->getRegClassName(DRC) << " register.\n"; } } } @@ -1689,7 +1689,7 @@ void MachineVerifier::visitMachineFunctionAfter() { if (MInfo.regsKilled.count(*I)) { report("Virtual register killed in block, but needed live out.", &MBB); errs() << "Virtual register " << printReg(*I) - << " is used after the block.\n"; + << " is used after the block.\n"; } } @@ -1722,13 +1722,13 @@ void MachineVerifier::verifyLiveVariables() { if (!VI.AliveBlocks.test(MBB.getNumber())) { report("LiveVariables: Block missing from AliveBlocks", &MBB); errs() << "Virtual register " << printReg(Reg) - << " must be live through the block.\n"; + << " must be live through the block.\n"; } } else { if (VI.AliveBlocks.test(MBB.getNumber())) { report("LiveVariables: Block should not be in AliveBlocks", &MBB); errs() << "Virtual register " << printReg(Reg) - << " is not needed live through the block.\n"; + << " is not needed live through the block.\n"; } } } |

