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path: root/llvm/lib/CodeGen/MachineRegisterInfo.cpp
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* GlobalISel: allow CodeGen to fallback on VReg type/class issues.Tim Northover2016-11-081-11/+0
* MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFCMatthias Braun2016-10-281-2/+1
* Fix warning; NFCMatthias Braun2016-10-111-2/+2
* MIRParser: generic register operands with typesMatthias Braun2016-10-111-1/+2
* MIRParser: Rewrite register info initialization; mostly NFCMatthias Braun2016-10-111-7/+10
* [TargetRegisterInfo, AArch64] Add target hook for isConstantPhysReg().Geoff Berry2016-09-271-1/+5
* GlobalISel: remove "unsized" LLTTim Northover2016-09-151-1/+1
* GlobalISel: disambiguate types when printing MIRTim Northover2016-09-121-2/+0
* GlobalISel: move type information to MachineRegisterInfo.Tim Northover2016-09-091-14/+14
* MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun2016-08-241-1/+6
* [GlobalISel] Introduce an instruction selector.Ahmed Bougacha2016-07-271-0/+14
* [GlobalISel] Mark newly-created gvregs as having a bank.Ahmed Bougacha2016-07-191-2/+5
* [IPRA] Properly compute register usage at call sites.Chad Rosier2016-07-111-2/+3
* Replace MachineRegisterInfo::TracksLiveness with a MachineFunctionPropertyDerek Schuff2016-04-111-2/+1
* [MachineRegisterInfo] Track register bank for virtual registers.Quentin Colombet2016-04-071-1/+6
* Replace MachineRegisterInfo::isSSA() with a MachineFunctionPropertyDerek Schuff2016-04-041-2/+2
* [MachineRegisterInfo] Add a method to set the size of a virtual register a po...Quentin Colombet2016-03-071-0/+4
* [MachineRegisterInfo] Get rid of the global-isel ifdefs.Quentin Colombet2016-03-071-6/+3
* [GlobalISel][MachineRegisterInfo] Add a method to create generic vregs.Quentin Colombet2016-02-111-0/+16
* [GlobalISel] Remember the size of generic virtual registersQuentin Colombet2016-02-101-0/+9
* Scheduler / Regalloc: use unique_ptr[] instead of std::vectorFiona Glaser2015-12-021-4/+3
* Refactor: Simplify boolean conditional return statements in lib/CodeGen.Rafael Espindola2015-10-241-5/+2
* TargetRegisterInfo: Add typedef unsigned LaneBitmask and use it where apropri...Matthias Braun2015-09-251-2/+1
* MachineRegisterInfo: Introduce isPhysRegUsed()Matthias Braun2015-08-181-0/+12
* Reset the virtual registers in liveins when clearing the virtual registers.Alex Lorenz2015-07-271-0/+2
* MachineRegisterInfo: Remove UsedPhysReg infrastructureMatthias Braun2015-07-141-1/+0
* PrologEpilogInserter: Rewrite API to determine callee save regsiters.Matthias Braun2015-07-141-0/+47
* Have TargetRegisterInfo::getLargestLegalSuperClass take aEric Christopher2015-03-101-1/+1
* MachineRegisterInfo can access TII off of the MachineFunction'sEric Christopher2015-01-271-2/+2
* Silence more static analyzer warnings.Michael Ilseman2014-12-151-0/+1
* Add a flag to enable/disable subregister liveness.Matthias Braun2014-12-101-1/+2
* LiveInterval: Add support to track liveness of subregisters.Matthias Braun2014-12-101-0/+8
* CodeGen: switch raw array to std::vectorDylan Noblesmith2014-08-251-8/+1
* Have MachineRegisterInfo take and store the MachineFunction itEric Christopher2014-08-121-2/+2
* Changed the liveness tracking in the RegisterScavengerPedro Artigas2014-08-041-2/+9
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+2
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check i...Craig Topper2014-04-141-9/+9
* Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson2014-03-171-10/+10
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-14/+15
* Fix for http://llvm.org/bugs/show_bug.cgi?id=18590Ekaterina Romanova2014-03-131-0/+15
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-2/+2
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
* [RegAlloc] Make tryInstructionSplit less aggressive.Quentin Colombet2014-01-021-11/+3
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+3
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-3/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+3
* Notify LiveRangeEdit of new virtual registers.Mark Lacey2013-08-141-1/+3
* Directly access objects which may change during compilation.Bill Wendling2013-06-171-20/+31
* Add an MRI::verifyUseLists() function.Jakob Stoklund Olesen2013-04-191-3/+51
* Check register classes also when changing them.Jakob Stoklund Olesen2013-03-131-0/+1
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