summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineRegisterInfo.cpp
diff options
context:
space:
mode:
authorMatthias Braun <matze@braunis.de>2016-10-11 04:22:29 +0000
committerMatthias Braun <matze@braunis.de>2016-10-11 04:22:29 +0000
commit3d85ebe5b1cb211cf97b55c0ae902aefc689306e (patch)
treecbbd713e572431fd436a5c06fbd8b30ff3acf1d0 /llvm/lib/CodeGen/MachineRegisterInfo.cpp
parent086a78cf23eaec7c7dba9809f80f9e8b495f3589 (diff)
downloadbcm5719-llvm-3d85ebe5b1cb211cf97b55c0ae902aefc689306e.tar.gz
bcm5719-llvm-3d85ebe5b1cb211cf97b55c0ae902aefc689306e.zip
MIRParser: generic register operands with types
This should fix the fallout of r283848. llvm-svn: 283850
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineRegisterInfo.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index 5b42cd01efc..96a5888b370 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -124,7 +124,8 @@ LLT MachineRegisterInfo::getType(unsigned VReg) const {
void MachineRegisterInfo::setType(unsigned VReg, LLT Ty) {
// Check that VReg doesn't have a class.
- assert(!getRegClassOrRegBank(VReg).is<const TargetRegisterClass *>() &&
+ assert(getRegClassOrRegBank(VReg).isNull() ||
+ !getRegClassOrRegBank(VReg).is<const TargetRegisterClass *>() &&
"Can't set the size of a non-generic virtual register");
getVRegToType()[VReg] = Ty;
}
OpenPOWER on IntegriCloud