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author | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2017-11-26 19:21:17 -0800 |
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committer | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2017-11-26 19:21:17 -0800 |
commit | b549320d436c9504bf56fb62e430b394758abacd (patch) | |
tree | 4941186a5d9a839fea286ec76f53b18fd0c3c23d /examples/Scientific.vhd | |
parent | c09fdd94910cde79530a128027bce7102fe87b78 (diff) | |
download | vhdl2vl-b549320d436c9504bf56fb62e430b394758abacd.tar.gz vhdl2vl-b549320d436c9504bf56fb62e430b394758abacd.zip |
Examples: match case of module name in filename
Diffstat (limited to 'examples/Scientific.vhd')
-rw-r--r-- | examples/Scientific.vhd | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/examples/Scientific.vhd b/examples/Scientific.vhd new file mode 100644 index 0000000..d71e55d --- /dev/null +++ b/examples/Scientific.vhd @@ -0,0 +1,13 @@ +library IEEE; +use IEEE.std_logic_1164.all; + +entity Scientific is + generic ( + exp1: integer := 25e6; + exp2: integer := 25E6; + exp3: real := 25.0e6 + ); + port( + clk : in std_logic + ); +end Scientific; |