| Commit message (Collapse) | Author | Age | Files | Lines |
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For some system planars we need to apply some fixups to the PCI slot
power controllers. These are done at boot time and a slightly bizzare in
their construction since they share the I2C request completion callback
with the runtime slot power on method which affects the PCI slot state
machine.
This is confusing to say the least, so this patch reworks the fixup code
to use the synchronus I2C request code rather than open-coding the wait
based on what PCI slot state is in use. It also does some general
control flow cleanup and adds some comments explaining what the fixups
are for.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We can slot information from the LXVPD without having power control
information about that slot. This patch changes the init path so that
we always override the add_properties() call rather than only when we
have power control information about the slot.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Useful to know since it changes the behaviour of the slot core.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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>From memory this was disabled in the distant past since we were waiting
for an updates to the LXPVD format. It looks like that never happened
so re-enable it for the ZZ platform so that we can get PCI slot location
codes on ZZ.
Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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When the bus alloc and free methods were removed we missed a case in the
Firenze platform slot code that relied on the the bus-specific method to
the bus pointer in the request structure. This results in a
branch-to-null during boot and a crash. This patch fixes it by
initialising it manually here.
Fixes: 801462feb7d6 ("core/i2c: Remove bus specific alloc and free callbacks")
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Presence detection for opencapi adapters was broken for ZZ planars v3
and below. All ZZ systems currently used in the lab have had their
planar upgraded, so we can now remove the override we had to force
presence and activate presence detection. Which should improve boot
time.
Considering the state of opal support on ZZ, this is really only for
lab usage on BML. The opencapi enablement team has okay'd the
change. In the unlikely case somebody tries opencapi on an old ZZ, the
presence detection through i2c will show that no adapter is present
and skiboot won't try to access or train the link.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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These are now pointless and they can be replaced with zalloc() and free().
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Currently to set a per-request timeout you need to use
i2c_req_set_timeout() which is a wrapper for a per-bus method that sets the
actual timeout. This design doesn't make a whole lot of sense, so move
the timeout field into the generic i2c_request structure and set the
timeout to be set using that.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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In platform_ocapi, we define i2c_{reset,presence}_odl{0,1} to specify the
appropriate reset/presence GPIO pins for devices connected to ODL0 and ODL1
respectively.
This is obviously wrong, because a device connected to brick 2 and a device
connected to brick 4 are going to be different devices connected to
different I2C pins, but rather conveniently we haven't had to deal with
systems that can use the full 4 bricks as yet. Now that we're adding
OpenCAPI support for Witherspoon, we should change this to specify pins
separately for all 4 bricks.
Replace i2c_{reset,presence}_odl{0,1} with
i2c_{reset,presence}_brick{2,3,4,5} and update the presence detection code,
device reset code, and existing platforms accordingly.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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There is no standardised way to determine the presence and type of devices
connected to an NPU on POWER9.
Currently, we hardcode device types based on platform type (as no platform
currently supports both OpenCAPI and NVLink), and for OpenCAPI platforms
we use I2C to detect presence.
Witherspoon (and potentially other platforms later on) supports both
NVLink and OpenCAPI, and additionally uses SXM2 connectors which can carry
more than one link, rather than the SlimSAS connectors used for OpenCAPI on
Zaius and ZZ. This necessitates some special handling.
Add a platform callback for NPU device detection. In a later patch, we
will use this to implement Witherspoon-specific device detection. For now,
add a Witherspoon stub that sets all links to NVLink (i.e. current
behaviour).
Move the existing I2C-based presence detection for OpenCAPI devices on
Zaius/ZZ into common code, which we use by default for platforms which do
not define a callback. Clean up the use of the ibm,npu-link-type property,
which will now be exposed solely for debugging and not consumed internally.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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OCC declarations are currently split between skiboot.h and occ-sensor.h.
Given the growing unwieldyness of skiboot.h it's probably time to move it
all into one header.
Rename occ-sensor.h to occ.h, move all OCC-related declarations out of
skiboot.h, and add #includes as necessary.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We only touch it in limited places, let's simplify skiboot.h
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Rework a bit the code to reset the opencapi adapter:
- make clearer which i2c pin is resetting which device
- break the reset operation in smaller chunks. This is really to
prepare for a future patch.
No functional changes.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Presence detection is not part of the opencapi specification. So each
platform may choose to implement it the way it wants.
All current platforms implement it through an i2c device where we can
query a pin to know if a device is connected or not. ZZ and Zaius have
a similar design and even use the same i2c information and pin
numbers.
However, presence detection on older ZZ planar (older than v4) doesn't
work, so we don't activate it for now, until our lab systems are
upgraded and it's better tested.
Presence detection on witherspoon is still being worked on. It's
shaping up to be quite different, so we may have to revisit the topic
in a later patch.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Add OpenCAPI platform data for the zaius and zz platforms, as well as the
generic platform that's used for BML boots. Currently, all three platforms
are identical, but that won't always be the case (e.g. Witherspoon).
Additionally, for Zaius, hardcode link information and the I2C bus that's
required to reset OpenCAPI devices, because this currently can't be
extracted from HDAT. Eventually this will go away once Hostboot adds the
relevant data in HDAT. A later patch will add this for ZZ once we've done
more testing.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This changes to build system to use thin archives rather than
incremental linking for built-in.o, similar to recent change to Linux.
built-in.o is renamed to built-in.a, and is created as a thin archive
with no index, for speed and size. All built-in.a are aggregated into
a skiboot.tmp.a which is a thin archive built with an index, making it
suitable or linking. This is input into the final link.
The advantags of build size and linker code placement flexibility are
not as great with skiboot as a bigger project like Linux, but it's a
conceptually better way to build, and is more compatible with link
time optimisation in toolchains which might be interesting for skiboot
particularly for size reductions.
Size of build tree before this patch is 34.4MB, afterwards 23.1MB.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch adds support to read u64 sensor values. This also adds
changes to the core and the backend implementation code to make this
API as the base call. Host can use this new API to read sensors
upto 64bits.
This adds a list to store the pointer to the kernel u32 buffer, for
older kernels making async sensor u32 reads.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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See 696d378d7b7295366e115e89a785640bf72a5043 for all the details.
Suggested-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We had a race condition between FSP Reset/Reload and powering down
the system from the host:
Roughly:
FSP Host
--- ----
Power on
Power on
(inject EPOW)
(trigger FSP R/R)
Processes EPOW event, starts shutting down
calls OPAL_CEC_POWER_DOWN
(is still in R/R)
gets OPAL_INTERNAL_ERROR, spins in opal_poll_events
(FSP comes back)
spinning in opal_poll_events
(thinks host is running)
The call to OPAL_CEC_POWER_DOWN is only made once as the reset/reload
error path for fsp_sync_msg() is to return -1, which means we give
the OS OPAL_INTERNAL_ERROR, which is fine, except that our own API
docs give us the opportunity to return OPAL_BUSY when trying again
later may be successful, and we're ambiguous as to if you should retry
on OPAL_INTERNAL_ERROR.
For reference, the linux code looks like this:
>static void __noreturn pnv_power_off(void)
>{
> long rc = OPAL_BUSY;
>
> pnv_prepare_going_down();
>
> while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
> rc = opal_cec_power_down(0);
> if (rc == OPAL_BUSY_EVENT)
> opal_poll_events(NULL);
> else
> mdelay(10);
> }
> for (;;)
> opal_poll_events(NULL);
>}
Which means that *practically* our only option is to return OPAL_BUSY
or OPAL_BUSY_EVENT.
We choose OPAL_BUSY_EVENT for FSP systems as we do want to ensure we're
running pollers to communicate with the FSP and do the final bits of
Reset/Reload handling before we power off the system.
Additionally, we really should update our documentation to point all
of these return codes and what action an OS should take.
CC: stable
Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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OPAL currently doesn't know about the 2s2u zz. It recognizes such a
box as a generic BMC machine and fails to boot. Add the 2s2u as a
supported platform.
There will subsequently be a 2s2u-L system which may have a different
compatible property, which will need to be handled later.
Signed-off-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The current implmentation has incorrect assumptions: there is
always a PCI slot associated with root port and PCIe switch
downstream port and all of them are capable to change its
power state by register PCICAP_EXP_SLOTCTL. Firstly, there
might not a PCI slot associated with the root port or PCIe
switch downstream port. Secondly, the power isn't controlled
by standard config register (PCICAP_EXP_SLOTCTL). There are
I2C slave devices used to control the power states on Tuleta.
In order to use the PCI slot's methods to manage the power
states, this does:
* Introduce PCI_SLOT_FLAG_ENFORCE, indicates the request operation
is enforced to be applied.
* pci_enable_bridge() is split into 3 functions: pci_bridge_power_on()
to power it on; pci_enable_bridge() as a place holder and
pci_bridge_wait_link() to wait the downstream link to come up.
* In pci_bridge_power_on(), the PCI slot's specific power management
methods are used if there is a PCI slot associated with the PCIe
switch downstream port or root port.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This refactors firenze_pci_setup_power_mgt() and no logicial changes
introduced:
* Avoid nested if block;
* Remove the local variable @buddy. The information is retrieved
directly from struct firenze_pci_slot_info::buddy;
* Comments to explain the fixed register offset (0x69) for slot's
power control and shared power state between local slot and its
buddy.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This introduces another data struct to describe the PCI slot fixup
information. With that, the PCI slot fixup information table is
decoupled from the PCI slot information table, to make the code
easier to be maintained. In the meanwhile, the PCI slot information
struct, which has been complexed, is simplified. It shouldn't
introduce any functional changes.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When powering off the PCI slot, the corresponding bits should
be set to 0bxx00xx00 instead of 0bxx11xx11. Otherwise, the
specified PCI slot can't be put into power-off state. Fortunately,
it didn't introduce any side-effects so far.
Cc: stable # 5.3.0+
Fixes: 6884fe63ba1e ("platforms/ibm-fsp: Support PCI slot")
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In P9 FSP box, OCC image is pre-loaded. So do not handle the load
command and send SUCCESS to FSP on recieving OCC_LOAD mbox message.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It turns out GCC7 adds a useful warning and does fancy things like
parsing your comments to work out that you intended to do the fallthrough.
There's a few places where we don't match the regex. Fix them, as it's
harmless to do so.
Found by building on Fedora Rawhide in Travis.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Previously the PRD tooling ran on the FSP, but it was moved into
userspace on the host for OpenPower systems. For P9 this system
was adopted for FSP systems too.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Adds a new platform for P9 FSP machines. Currently this is just a
barebones FSP platform with the firenze/apollo PCI specific stuff removed.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add static to various declarations that can use it, as found by sparse.
It turns out that one of these (fsp_pcie_inv_lock in
platform/ibm-fsp/firenze.c) is actually unused, so remove it.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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PCI slot pfreset() operation is obsoleted as nobody uses it. This
removes it and the related PCI slot states. No functional changes
introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Various backends define their own PCI slot states for flexibility
with numbers [A]. PCI core also defines its PCI slot states [B].
For one specific PCI slot state, the major number of [A] and [B]
should be same so that the corresponding operation can be found.
It means [A] and [B] are relevant to some extent, but the code
where defines the PCI slots in backends doesn't reflect it.
This makes the major PCI slot state defined in backend same to
the corresponding one defined in PCI core. The minor PCI slot
states are made to be incremental to their base number (major
PCI slot state). No functional changes introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This claims PCIe surprise hotplug capability through device node's
property "ibm,slot-surprise-pluggable". The slot has the capability
when surprise hotplug is supported in its slot's capability bits or
link state change reporting is supported in PCIe link capability bits.
In order for link state events to be properly raised during surprise
hotplug, the power supply to the slot should be always on. The slot's
power state should be switched accordingly during fundamental reset.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In the PCI post-fundamental reset code, a hot reset is performed at the
end. This is causing issues at boot time as a reset signal is being sent
downstream before the links are up, which is causing issues on adapters
behind switches. No errors result in skiboot, but the adapters are not
usable in Linux as a result.
Hot resets also occur in the FSP platform-specific code for conventional
PCI slots, which could cause issues.
This patch fixes some adapters not being configurable in Linux on some
systems. The issue was not present in skiboot 5.2.x.
Cc: stable # 5.3.x
Signed-off-by: Russell Currey <ruscur@russell.cc>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Commit 5cda6f6d added 8 byte property instead of 4 byte..which resulted
in below calltrace.
I think its fine to convert u64 to u32 here as we devide bus frequency
by 4.
Backtrace:
----------
[ 1.212366090,3] DT: Unexpected property length /xscom@3fc0000000000/i2cm@a0020/clock-frequency
[ 1.212369108,3] DT: Expected len: 4 got len: 8
[ 1.212370117,0] Assert fail: core/device.c:603:0
[ 1.212371550,0] Aborting!
CPU 0870 Backtrace:
S: 0000000033dc39e0 R: 0000000030013758 .backtrace+0x24
S: 0000000033dc3a60 R: 0000000030018e0c ._abort+0x4c
S: 0000000033dc3ae0 R: 0000000030018e88 .assert_fail+0x34
S: 0000000033dc3b60 R: 0000000030023da4 .dt_require_property+0xb4
S: 0000000033dc3bf0 R: 000000003002403c .dt_prop_get_u32+0x14
S: 0000000033dc3c60 R: 000000003004e884 .p8_i2c_init+0x12c
S: 0000000033dc3e30 R: 0000000030014684 .main_cpu_entry+0x4a8
S: 0000000033dc3f00 R: 00000000300025a0 boot_entry+0x198
Fixes: 5cda6f6d (platforms/firenze: Fix I2C clock source frequency)
Fixes: 5acf424a (HDAT: Fix typo in nest-frequency property)
Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
CC: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Previously the power_ctl bit provided by the VPD was unused, now that we
are correctly assigning it we can use it when determining the slot reset
method.
The power_ctl bit is used to represent if power management is available.
If power_ctl is set to true, then the I2C based external power management
functionality will be populated on the PCI slot. Otherwise we will try to
use the inband PERST as the fundamental reset, as before.
While we are here we introduce a helper function to isolate the logic
initialisation for the I2C based external power management, to improve
readibility.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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For a 1004 slot mapping bit 6 (0x40) of the P0 field represents the
pwr_ctl bit. This code previously accessed the wrong field (power_ctl)
which is a single bit which corresponds to the 1005 mapping (which is
the wrong mapping), performed a bitwise and with 0x40 (which will always
be 0), and then compared to 1 (which will also always be 0).
Fix this to access the byte struct member, bitwise and with 0x40 to mask
the power_ctl bit, and double negate to guarantee 0 or 1 result.
Fixes: Coverity Bug #97820
Fixes: 6884fe63 ("platforms/ibm-fsp: Support PCI slot")
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We shouldn't have a hotpluggable slot behind PHB as the root port
cannot be plugged. This removes the association between PHB slot
and platform specific slot. Otherwise, we will run into strange
situation: there are two slots behind PHB and root port separately,
but both of them are dereferencing same platform specific slot.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently, we have separately I2C stubs used for PCI slot power
management and fixup. It's reasonable to merge them to one so
that the code looks unified. Also, this introduces a table tracking
PCI slot fixup info which is very easy to be extended in future.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In firenze_pci_slot_init(), i2c_alloc_req() can return NULL though
it's very rare. We don't cover the case. If NULL I2C request returned
from the function, the I2C dependent power management won't be used.
This checks if i2c_alloc_req() returns valid I2C request or not.
Suggested-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Found with static analysis:
939 id = ((uint64_t)p[1] << 32) | p[2];
value_overwrite: Overwriting previous write to id with value 0ULL.
940 id = 0;
Fixes: 6884fe63
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We also convert from custom prlog() macros over to straight prlog
with the magic pr_fmt define.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The patch reworks PCI stuff for IBM's Apollo and Firenze platforms to
support PCI slot:
* Platform shared PCI slot is represented by "struct lxvpd_pci_slot"
for Apollo and Firenze. The information of that is fetched from
VPD.
* Apollo platform uses "struct lxvpd_pci_slot" as its platform slot,
while Firenze platform uses "struct firenze_pci_slot" as its
platform slot in order to support external I2C-based PCI slot power
maangement as well as PERST supported by the downstream ports of
particular PLX PCIe switches.
* On Firenze platform, the properties and methods to manage PHB slot
might be overrided to utilize the capability of external power
management.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Every PCIE bridge port or PHB is expected to be bound with PCI slot
, to which various PCI slot's functionalities are attached (e.g. power,
link, reset). This supports PCI slot:
* PCI slot is reprsented by "struct pci_slot".
* "struct pci_slot_ops" represents the functions supported on the
PCI slot. It's initialized by PCI slot core at the beginning and
allowed to be overrided by platform partially or completely.
* On PCI hot plugging event, the PCI devices behind the slot are
enumarated. Device sub-tree is populated and sent to OS by OPAL
message.
* On PCI hot unplugging event, the PCI devices behind the slot are
destroyed. Device sub-tree is removed and the slot is powered off.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The I2C master clock source frequency is hardcoded to wrong value.
The correct frequency should be the nest clock frequency divided
by 16 as Ben said.
This fixes I2C master source frequency with the help of additional
properties "nest-frequency" and "bus-frequency" to root and xscom
device node separately.
Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: fixup hdata test for added property]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Since we are anyway on the way to standby and apparently the other
hypervisor also does this.
Tested-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Current abort() call works fine on FSP based system. We need different
mechanism on BMC based machine. Hence introduce platform hook for
terminate call.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This moves some fields that are specific to the LXVPD mechanism out
of the generic pci_slot_info into a private wrapper. Additionally,
most fields in pci_slot_info are made signed integers in order to
allow them to be set to "-1" which indicates that the field doesn't
have a meaningful value, and inhibits creation of the corresponding
device-tree property.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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See https://github.com/lucasdemarchi/codespel
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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