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* ipmi: call check_timers() while waiting for synchronous messages to complete04-16-2019Cédric Le Goater2019-04-301-1/+9
| | | | | | | | | | | | | BT responses are handled using a timer doing the polling. To hope to get an answer to an IPMI synchronous message, the timer needs to run. This issue shows up very quickly under QEMU when loading the first flash resource with the IPMI HIOMAP backend. Adding a timeout would also help in reporting errors instead of looping indefinitely waiting for a response. Signed-off-by: Cédric Le Goater <clg@kaod.org>
* Temporary fix to expose proper MVPD size to host OSRaptor Engineering Development Team2019-04-241-0/+9
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* opal-prd : Add options to set OCC in overclock modeShilpasri G Bhat2019-04-241-1/+66
| | | | | | | | | This option sets the OCC in characterization mode and the changes the governor to performance. This patch adds two new sub-options to 'occ' sub-command Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
* Mark all partitions except full PNOR and boot kernel firmware read onlyTimothy Pearson2019-04-241-0/+7
| | | | Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* Expose PNOR Flash partitions to host MTD driver via devicetreeTimothy Pearson2019-04-242-12/+65
| | | | Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* Write boot progress to LPC ports 81 and 82Stewart Smith2019-04-242-2/+102
| | | | | | | | | | | There's a thought to write more extensive boot progress codes to LPC ports 81 and 82 to supplement/replace any reliance on port 80. We want to still emit port 80 for platforms like Zaius and Barreleye that have the physical display. Ports 81 and 82 can be monitored by a BMC though. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Write boot progress to LPC port 80hStewart Smith2019-04-246-3/+195
| | | | | | | | | | | | | | | | | This is an adaptation of what we currently do for op_display() on FSP machines, inventing an encoding for what we can write into the single byte at LPC port 80h. Port 80h is often used on x86 systems to indicate boot progress/status and dates back a decent amount of time. Since a byte isn't exactly very expressive for everything that can go on (and wrong) during boot, it's all about compromise. Some systems (such as Zaius/Barreleye G2) have a physical dual 7 segment display that display these codes. So far, this has only been driven by hostboot (see hostboot commit 90ec2e65314c). Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Remove Talos DT match from Romulus fileTimothy Pearson2019-04-241-2/+1
| | | | Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* Copy and convert Romulus descriptors to TalosTimothy Pearson2019-04-242-1/+88
| | | | Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* hw/xscom: P9P rather than P9Stewart Smith2019-04-171-1/+1
| | | | | Fixes: 2c8f96534a978bb4cac3e4b7dd393a9cc4926555 Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/xscom: add missing P9P chip nameNicholas Piggin2019-04-171-1/+1
| | | | | Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* asm/head: balance branches to avoid link stack predictor mispredictsNicholas Piggin2019-04-171-1/+6
| | | | | | | | | | | | | | | | | | | | | | | The Linux wrapper for OPAL call and return is arranged like this: __opal_call: mflr r0 std r0,PPC_STK_LROFF(r1) LOAD_REG_ADDR(r11, opal_return) mtlr r11 hrfid -> OPAL opal_return: ld r0,PPC_STK_LROFF(r1) mtlr r0 blr When skiboot returns to Linux, it branches to LR (i.e., opal_return) with a blr. This unbalances the link stack predictor and will cause mispredicts back up the return stack. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* external/mambo: also invoke readline for the non-autorun caseNicholas Piggin2019-04-171-0/+2
| | | | | Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* asm/head.S: set POWER9 radix HID bit at entryNicholas Piggin2019-04-174-20/+5
| | | | | | | | | | | When running in virtual memory mode, the radix MMU hid bit should not be changed, so set this in the initial boot SPR setup. As a side effect, fast reboot also has HID0:RADIX bit set by the shared spr init, so no need for an explicit call. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal-prd: Fix memory leak in is-fsp-system checkVasant Hegde2019-04-171-1/+6
| | | | | Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal-prd: Check malloc return valueVasant Hegde2019-04-171-0/+4
| | | | | Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Makefile: Build with symbolsJoel Stanley2019-04-171-1/+1
| | | | | Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/phb4: Squash the IO bridge windowOliver O'Halloran2019-04-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The PCI-PCI bridge spec says that bridges that implement an IO window should hardcode the IO base and limit registers to zero. Unfortunately, these registers only define the upper bits of the IO window and the low bits are assumed to be 0 for the base and 1 for the limit address. As a result, setting both to zero can be mis-interpreted as a 4K IO window. This patch fixes the problem the same way PHB3 does. It sets the IO base and limit values to 0xf000 and 0x1000 respectively which most software interprets as a disabled window. lspci before patch: 0000:00:00.0 PCI bridge: IBM Device 04c1 (prog-if 00 [Normal decode]) I/O behind bridge: 00000000-00000fff lspci after patch: 0000:00:00.0 PCI bridge: IBM Device 04c1 (prog-if 00 [Normal decode]) I/O behind bridge: None Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* build: link with --orphan-handling=warnNicholas Piggin2019-04-171-0/+2
| | | | | | | | | The linker can warn when the linker script does not explicitly place all sections. These orphan sections are placed according to heuristics, which may not always be desirable. Enable this warning. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal-ci: Centos7 with latest crosstool toolchain (gcc 8.1.0)Stewart Smith2019-04-172-4/+4
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* build/lds: place remaining sections according to defaultsNicholas Piggin2019-04-171-4/+11
| | | | | | | | Place remaining orphan linker sections according to default script as described by `ld --verbose`. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* build/lds: place debug sections according to defaultsNicholas Piggin2019-04-171-0/+45
| | | | | | | | Place debug orphan linker sections according to default script as described by `ld --verbose`. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* build: -fno-asynchronous-unwind-tablesNicholas Piggin2019-04-172-1/+2
| | | | | | | | skiboot does not use unwind tables, this option saves about 100kB, mostly from .text. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* chiptod: Remove unused prototype from headerJordan Niethe2019-04-171-1/+0
| | | | | | | | | There is prototype for chiptod_reset_tb() in include/chiptod.h. However no definition is ever provided, nor is it ever used. Remove the prototype. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/xscom: Enable sw xstop by default on p9Oliver O'Halloran2019-04-171-24/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was disabled at some point during bringup to make life easier for the lab folks trying to debug NVLink issues. This hack really should have never made it out into the wild though, so we now have the following situation occuring in the field: 1) A bad happens 2) The host kernel recieves an unrecoverable HMI and calls into OPAL to request a platform reboot. 3) OPAL rejects the reboot attempt and returns to the kernel with OPAL_PARAMETER. 4) Kernel panics and attempts to kexec into a kdump kernel. A side effect of the HMI seems to be CPUs becoming stuck which results in the initialisation of the kdump kernel taking a extremely long time (6+ hours). It's also been observed that after performing a dump the kdump kernel then crashes itself because OPAL has ended up in a bad state as a side effect of the HMI. All up, it's not very good so re-enable the software checkstop by default. If people still want to turn it off they can using the nvram override. Cc: skiboot-stable@lists.ozlabs.org Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Acked-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal/hmi: Initialize the hmi event with old value of TFMR.Mahesh Salgaonkar2019-04-171-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Do this before we fix TFAC errors. Otherwise the event at host console shows no thread error reported in TFMR register. Without this patch the console event show TFMR with no thread error: (DEC parity error TFMR[59] injection) [ 53.737572] Severe Hypervisor Maintenance interrupt [Recovered] [ 53.737596] Error detail: Timer facility experienced an error [ 53.737611] HMER: 0840000000000000 [ 53.737621] TFMR: 3212000870e04000 After this patch it shows old TFMR value on host console: [ 2302.267271] Severe Hypervisor Maintenance interrupt [Recovered] [ 2302.267305] Error detail: Timer facility experienced an error [ 2302.267320] HMER: 0840000000000000 [ 2302.267330] TFMR: 3212000870e14010 Fixes: 674f7696f ("opal/hmi: Rework HMI handling of TFAC errors") Cc: skiboot-stable@lists.ozlabs.org Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/pci: Prefer ibm, slot-label when finding loc codesOliver O'Halloran2019-04-171-5/+10
| | | | | | | | | | | | | | | | | On OpenPower systems the ibm,slot-label property is used to identify slots rather than the more verbose ibm,slot-location-code. The slot-label lookup is currently broken since it assumes that the ibm,slot-label is in the PCI device node rather than in the node of the device that provides the slot (e.g. root port or switch downstream port). This patch corrects the lookup code to search the parent node (and possibly it's grandparents), similar to how we search for ibm,slot-location-code. Fixes: 1c3baae4f2b3 ("hdata/iohub: Look for IOVPD on P9") Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* skiboot v6.3-rc2 release notesStewart Smith2019-04-111-0/+96
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* test-ipmi-hiomap: Add read-one-byte testVasant Hegde2019-04-091-0/+40
| | | | | | | | | | | | Add test case to read: - 1 byte - 1 block and 1 byte data Cc: Andrew Jeffery <andrew@aj.id.au> Cc: skiboot-stable@lists.ozlabs.org Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* test-ipmi-hiomap: Fix lpc-read-successVasant Hegde2019-04-091-1/+3
| | | | | | | | Cc: Andrew Jeffery <andrew@aj.id.au> Cc: skiboot-stable@lists.ozlabs.org Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* test-ipmi-hiomap: Add write-one-byte testVasant Hegde2019-04-091-0/+38
| | | | | | | | | | | | Add test case to write: - 1 byte - 1 block and 1 byte data Cc: Andrew Jeffery <andrew@aj.id.au> Cc: skiboot-stable@lists.ozlabs.org Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* test-ipmi-hiomap: Assert if size is zeroVasant Hegde2019-04-091-1/+2
| | | | | | | | Cc: Andrew Jeffery <andrew@aj.id.au> Cc: skiboot-stable@lists.ozlabs.org Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* libflash/ipmi-hiomap: Fix blocks count issueVasant Hegde2019-04-091-3/+18
| | | | | | | | | | | | | | | | | | | | | | | We convert data size to block count and pass block count to BMC. If data size is not block aligned then we endup sending block count less than actual data. BMC will write partial data to flash memory. Sample log : [ 594.388458416,7] HIOMAP: Marked flash dirty at 0x42010 for 8 [ 594.398756487,7] HIOMAP: Flushed writes [ 594.409596439,7] HIOMAP: Marked flash dirty at 0x42018 for 3970 [ 594.419897507,7] HIOMAP: Flushed writes In this case HIOMAP sent data with block count=0 and hence BMC didn't flush data to flash. Lets fix this issue by adjusting block count before sending it to BMC. Cc: Andrew Jeffery <andrew@aj.id.au> Cc: skiboot-stable@lists.ozlabs.org Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal/hmi: Never trust a cow!Frederic Barrat2019-04-091-1/+1
| | | | | | | | | | With opencapi, it's fairly common to trigger HMIs during AFU development on the FPGA, by not replying in time to an NPU command, for example. So shift the blame reported by that cow to avoid crowding my mailbox. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Dump (more) npu2 registers on link error and HMIsFrederic Barrat2019-04-094-57/+246
| | | | | | | | | | | | | | | | | | We were already logging some NPU registers during an HMI. This patch cleans up a bit how it is done and separates what is global from what is specific to nvlink or opencapi. Since we can now receive an error interrupt when an opencapi link goes down unexpectedly, we also dump the NPU state but we limit it to the registers of the brick which hit the error. The list of registers to dump was worked out with the hw team to allow for proper debugging. For each register, we print the name as found in the NPU workbook, the scom address and the register value. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Report errors to the OS if an OpenCAPI brick is fencedFrederic Barrat2019-04-092-4/+52
| | | | | | | | | | | | | | Now that the NPU may report interrupts due to the link going down unexpectedly, report those errors to the OS when queried by the 'next_error' PHB callback. The hardware doesn't support recovery of the link when it goes down unexpectedly. So we report the PHB as dead, so that the OS can log the proper message, notify the drivers and take the devices down. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Setup an error interrupt on some opencapi FIRsFrederic Barrat2019-04-093-14/+57
| | | | | | | | | | | | | | | | | | | | Many errors reported in the NPU FIR2 register, mostly catching unexpected errors on the opencapi link are defined as 'brick fatal' in the workbook, yet the default action is set to system checkstop. It's possible to see those errors during AFU development, where the AFU may send unexpected packets on the link, therefore triggering those errors. Checkstopping the system in this case is clearly extreme, as the error could be contained to the brick and proper analysis of a checkstop is not trivial outside of a bringup environment. This patch changes the default action of those errors so that the NPU will raise an interrupt instead. Follow-up patches will log proper information so that the error can be debugged and linux can catch the event. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Use NVLink irq setup for OpenCAPIFrederic Barrat2019-04-093-51/+19
| | | | | | | | | | | | | | Start using the irq setup code from NVLink for OpenCAPI, since the 2 versions are so close. There are only 2 differences: - the NPU may trigger more interrupts for OpenCAPI, 35 vs. 23, though none are configured to be triggered for now. - we need to enable the 4 translation faults interrupts for OpenCAPI. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Move npu2 irq setup code to common areaFrederic Barrat2019-04-092-100/+102
| | | | | | | | | | | The NPU IRQ setup code is currently duplicated between NVLink and OpenCAPI, yet it's almost identical. This patch moves the NVLink version of the code to the common file. A later patch will make use of it for OpenCAPI. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Fix OpenCAPI PE assignmentAndrew Donnellan2019-04-092-43/+52
| | | | | | | | | | | | | | | | | | | | When we support mixing NVLink and OpenCAPI devices on the same NPU, we're going to have to share the same range of 16 PE numbers between NVLink and OpenCAPI PHBs. For OpenCAPI devices, PE assignment is only significant for determining which System Interrupt Log register is used for a particular brick - unlike NVLink, it doesn't play any role in determining how links are fenced. Split the PE range into a lower half which is used for NVLink, and an upper half that is used for OpenCAPI, with a fixed PE number assigned per brick. As the PE assignment for OpenCAPI devices is fixed, set the PE once during device init and then ignore calls to the set_pe() operation. Suggested-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal-api: Reserve 2 OPAL API calls for future OpenCAPI LPC useAndrew Donnellan2019-04-091-2/+4
| | | | | | | | | | | | OpenCAPI Lowest Point of Coherency (LPC) memory is going to require some extra OPAL calls to set up NPU BARs. These calls will most likely be called OPAL_NPU_LPC_ALLOC and OPAL_NPU_LPC_RELEASE, we're not quite ready to upstream that code yet though. Reserve 171 and 172 for this purpose. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* README: Reflect openpower_mambo_defconfig name changeReza Arbab2019-04-092-2/+2
| | | | | | | The name of this op-build config has changed. Use the new name. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* cpufeatures: Add tm-suspend-hypervisor-assist and tm-suspend-xer-so-bug nodeStewart Smith2019-04-093-3/+209
| | | | | | | | | | | | | | | | | tm-suspend-hypervisor-assist for P9 >=DD2.2 And a tm-suspend-xer-so-bug node for P9 DD2.2 only. I also treat P9P as P9 DD2.3 and add a unit test for the cpufeatures infrastructure. Fixes: https://github.com/open-power/skiboot/issues/233 Suggested-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Tested-by: Michael Neuling <mikey@neuling.org> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Tested-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> [stewart: drop USABLE_OS for tm-suspend-hypervisor-assist] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* skiboot v6.3-rc1 release notesStewart Smith2019-03-291-0/+930
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Force noinline for pci_add_(one_)device_node(s)()Stewart Smith2019-03-292-10/+11
| | | | | | We call all of these things recursively, so don't use excess stack. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Bump allowed stack frame size for unit tests/host programsStewart Smith2019-03-291-1/+6
| | | | | | | | | | We tend to have a lot more things inlined when building unit tests, so let's just up the -Wframe-larger-than to avoid hitting it. This time, it was noticed in travis-ci with the ubuntu:latest image. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* ci/fedora29: --allowerasing to work around conflicting packagesStewart Smith2019-03-281-1/+1
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* ci: qemu boot tests should use built skibootStewart Smith2019-03-282-2/+2
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* ci: Remove debian-jessie boot test.Stewart Smith2019-03-287-84/+1
| | | | | | | | | | | | | Debian (in its infinite "wisdom") has decided to erase most evidence of there ever being a ppc64el installer for Debian Jessie. So, screw them. Backwards compatibility testing was for losers anyway. There is snapshot.debian.org, but it's *really* slow pulling things from there, so it's not really an option unless we want to add multiple minutes to test duration. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/firenze: Rework I2C controller fixupsOliver O'Halloran2019-03-281-49/+51
| | | | | | | | | | | | | | | | | For some system planars we need to apply some fixups to the PCI slot power controllers. These are done at boot time and a slightly bizzare in their construction since they share the I2C request completion callback with the runtime slot power on method which affects the PCI slot state machine. This is confusing to say the least, so this patch reworks the fixup code to use the synchronus I2C request code rather than open-coding the wait based on what PCI slot state is in use. It also does some general control flow cleanup and adds some comments explaining what the fixups are for. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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