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* Move pb_cen_hp_mode_curr register definition to xscom-p9-reg.hAlistair Popple2018-07-171-0/+4
| | | | | | | | Currently it is defined in npu2-regs.h but needs to be used by other files as well so move it somewhere generic. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal/hmi: check thread 0 tfmr to validate latched tfmr errors.Mahesh Salgaonkar2018-04-171-0/+8
| | | | | | | | | | | Due to P9 errata, HDEC parity and TB residue errors are latched for non-zero threads 1-3 even if they are cleared. But these are not latched on thread 0. Hence, use xscom SCOMC/SCOMD to read thread 0 tfmr value and ignore them on non-zero threads if they are not present on thread 0. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4: Activate shared PCI slot on witherspoonFrederic Barrat2017-06-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Witherspoon systems come with a 'shared' PCI slot: physically, it looks like a x16 slot, but it's actually two x8 slots connected to two PHBs of two different chips. Taking advantage of it requires some logic on the PCI adapter. Only the Mellanox CX5 adapter is known to support it at the time of this writing. This patch enables support for the shared slot on witherspoon if a x16 adapter is detected. Each x8 slot has a presence bit, so both bits need to be set for the activation to take place. Slot sharing is activated through a gpio. Note that there's no easy way to be sure that the card is indeed a shared-slot compatible PCI adapter and not a normal x16 card. Plugging a normal x16 adapter on the shared slot should be avoided on witherspoon, as the link won't train on the second slot, resulting in a timeout and a longer boot time. Only the first slot is usable and the x16 adapter will end up using only half the lines. If the PCI card plugged on the physical slot is only x8 (or less), then the presence bit of the second slot is not set, so this patch does nothing. The x8 (or less) adapter should work like on any other physical slot. Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: re-org code, move into platform file] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Migrate BAR assignment to phys_map_get()Michael Neuling2017-05-101-2/+0
| | | | | | | Keeps existing addresses. No functional change. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nx: Add POWER9 DARN supportMichael Neuling2017-04-271-0/+11
| | | | | | | | | | | | | | This sets up the per chip RNG MMIO BAR and points the per core DARN BAR at it. This is needed on P9 to enabled the DARN instruction (otherwise it'll cause a xstop). This includes a minor rework of some #defines to abstract MMIO definitions. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* POWER9: Add XSCOM related definitionsBenjamin Herrenschmidt2016-07-061-0/+12
Macros for EP/EX/EC accesses and some register definitions Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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