| Commit message (Collapse) | Author | Age | Files | Lines |
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trace-node information.
Add trace-node information in the device-tree document for IMC.
Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Add a new device-tree property freq-domain-indicator to define group of
CPUs which would share same frequency. This property has been added under
power-mgmt node. It is a bitmask.
Bitwise AND is taken between this bitmask value and PIR of cpu. All the
CPUs lying in the same frequency domain will have same result for AND.
For example, For POWER9, 0xFFF0 indicates quad wide frequency domain.
Taking AND with the PIR of CPUs will yield us frequency domain which is
quad wise distribution as last 4 bits have been masked which represent the
cores.
Similarly, 0xFFF8 will represent core wide frequency domain for P8.
Also, Add a new device-tree property domain-runs-at which will denote the
strategy OCC is using to change the frequency of a frequency-domain. There
can be two strategy - FREQ_MOST_RECENTLY_SET and FREQ_MAX_IN_DOMAIN.
FREQ_MOST_RECENTLY_SET : the OCC sets the frequency of the quad to the most
recent frequency value requested by the CPUs in the quad.
FREQ_MAX_IN_DOMAIN : the OCC sets the frequency of the CPUs in
the Quad to the maximum of the latest frequency requested by each of
the component cores.
Signed-off-by: Abhishek Goel <huntbag@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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OCC provides two limits for minimum powercap. One being hard powercap
minimum which is guaranteed by OCC and the other one is a soft
powercap minimum which is lesser than hard-min and may or may not be
asserted due to various power-thermal reasons. So to allow the users
to access the entire powercap range, this patch exports soft powercap
minimum as the "powercap-min" DT property. And it also adds a new
DT property called "powercap-hard-min" to export the hard-min powercap
limit.
Fixes: c6aabe3f2eb5("powercap: occ: Add a generic powercap framework")
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Clean up the formatting of power9-phb4.dts and move it to
external/devicetree/p9.dts. This sets us up to include it as the basis
for other trees.
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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A (non-qemu) p9 without an nx node will assert in p9_darn_init():
dt_for_each_compatible(dt_root, nx, "ibm,power9-nx")
break;
if (!nx) {
if (!dt_node_is_compatible(dt_root, "qemu,powernv"))
assert(nx);
return;
}
Since NX is this essential, add it to the device tree.
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Change "impi" to "ipmi".
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Remove the extra space causing this:
Error: power9-phb4.dts:156.15-16 syntax error
FATAL ERROR: Unable to parse input tree
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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this means that if it's permanently disabled on boot, the test suite can
pick that up and not try a fast reboot test.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Knowing the PEC index is going to be important when we enable relaxed
ordering, so store this value for later use.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
[arbab@linux.ibm.com: Rebase/refactor original changes]
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Reviewed-By: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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device tree
Currently, we distinguish between NPU links for NVLink devices and OpenCAPI
devices through the use of two different compatible strings - ibm,npu-link
and ibm,npu-link-opencapi.
As we move towards supporting configurations with both NVLink and OpenCAPI
devices behind a single NPU, we need to detect the device type as part of
presence detection, which can't happen until well after the point where the
HDAT or platform code has created the NPU device tree nodes. Changing a
node's compatible string after it's been created is a bit ugly, so instead
we should move the device type to a new property which we can add to the
node later on.
Get rid of the ibm,npu-link-opencapi compatible string, add a new
ibm,npu-link-type property, and a helper function to check the link type.
Add an "unknown" device type in preparation for later patches to detect
device type dynamically.
These device tree bindings are entirely internal to skiboot and are not
consumed directly by Linux, so this shouldn't break anything (other than
internal BML lab environments).
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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and by 'document', I mean 'gather a few extra minor bits of breadcrumbs
of clues as to what, when and why this thing exists'.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Suggested-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add a page for PCI device tree bindings. Right now it's just an example of
a PHB as seen on a POWER9 Zaius, and it could do with some extra
commentary.
Suggested-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This is a new CPU feature advertising interface that is fine-grained,
extensible, aware of privilege levels, and gives control of features
to all levels of the stack (firmware, hypervisor, and OS).
The design and binding specification is described in detail in doc/.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[stewart: fix maybe-uninitialized warning from older GCC, doc cleanup]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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POWER9 changes reflected in the libstb:
- bumped ibm,secureboot node to v2
- added ibm,cvc node
- hash-algo superseded by hw-key-hash-size
Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In P9, the Container Verification Code is stored in a hostboot reserved
memory and the list of provided CVC services is stored in the
TPMREL_IDATA_HASH_VERIF_OFFSETS idata array. Each CVC service has an
offset and version.
This adds the ibm,cvc device tree node and its documentation.
Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Parse SPD data and populate device tree.
list of properites parsing from SPD:
-----------------------------------
[root@ltc-wspoon dimm@d00f]# lsprop .
memory-id 0000000c (12) <-- DIMM type
product-version 00000032 (50) <-- Module Revision Code
device_type "memory-dimm-ddr4"
serial-number 15d9acb6 (366587062)
status "okay"
size 00004000 (16384)
phandle 000000bd (189)
ibm,loc-code "UOPWR.0000000-Node0-DIMM7"
part-number "36ASF2G72PZ-2G6B2 "
reg 0000d007 (53255)
name "dimm"
manufacturer-id 0000802c (32812) <-- Vendor ID, we can get vendor name from this ID
Also update documentation.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Reviewed-by: Reza Arbab <arbab@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Reviewed-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Recently we added `ecid`, `wafer-id` and `wafer-location` properties
under xscom node. Lets document these properties. Also update VPD
documentation.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Update the device-tree documentation to include a note about the
'ibm,chip-id' field in the platform device node for VAS. While here,
remove some trailing spaces.
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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NVLink2 links can support multiple different speeds. However the device driver
has no way of determining which speed was programmed so pass it down as a device
tree property.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Acked-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add new device-tree property 'ops' to define different operations
supported on each sensor-group.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Describe device-tree entries needed for 842 and gzip compression
engines on P9 NX.
Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Create a device tree node for VAS and add properties that Linux
will need to configure/use VAS.
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Adds a generic API to clear sensor groups. OCC inband sensor groups
such as CSM, Profiler and Job Scheduler can be cleared using this API.
It will clear the min/max of all sensors belonging to OCC sensor
groups.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add support to set the CPU-GPU power shifting ratio which is used by
the OCC power capping algorithm. PSR value of 100 takes all power away
from CPU first and a PSR value of 0 caps GPU first.
Documentation enhanced by Stewart Smith.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch adds a generic powercap framework and exports OCC powercap
sensors using which system powercap can be set inband through OPAL-OCC
command-response interface.
Documentation for powercap enhanced by Stewart Smith.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Today we have an issue where the NUMA nodes corresponding
to GPU's have the same affinity/distance as normal memory
nodes. Our reference-points today supports two levels
[0x4, 0x4] for normal systems and [0x4, 0x3] for Power8E
systems. This patch adds a new level [0x4, X, 0x2] and
uses node-id as at all levels for the GPU.
Cc: Reza Arbab <arbab@linux.vnet.ibm.com>
Cc: Alistair Popple <alistair@popple.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
Acked-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add a device tree binding documentation for the In Memory
Collection counter infrastructure.
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In P9 the pstate values are positive. They are continuous set of
unsigned integers [0 to +N] where Pmax is 0 and Pmin is N. The
linear ordering of pstates for P9 has changed compared to P8.
P8 has neagtive pstate values advertised as [0 to -N] where Pmax
is 0 and Pmin is -N. This patch adds helper routines to abstract
pstate comparison with pmax and adds sanity pstate limit checks.
This patch also fixes pstate arithmetic by using labs().
Suggested-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Jeff Scheel <scheel@us.ibm.com>
[stewart@linux.vnet.ibm.com: fix TODO item, capitalization]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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NVLink2 is a new feature introduced on POWER9 systems. It is an
evolution of of the NVLink1 feature included in POWER8+ systems but
adds several new features including support for GPU address
translation using the Nest MMU and cache coherence.
Similar to NVLink1 the functionality is exposed to the OS as a series
of virtual PCIe devices. However the actual hardware interfaces are
significantly different which limits the amount of common code that
can be shared between implementations in the firmware.
This patch adds basic hardware initialisation and exposure of the
virtual NVLink2 PCIe devices to the running OS.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently, we are hijacking the last bit of the resource field of the
sensor handler to differentiate the sensor families and route the
opal_sensor_read() call to the appropriate component.
Let's reserve the last 3bits and provide an API to set the sensor
family for current use and future use. This gives us a maximum of 8
families and 32 resource classes. The FSP uses 15, so we should be
fine for a while.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This gets us syntax highlighting of device tree snippets.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch changes
.txt to .rst for correctness of the documentation files,
path to the documentation files
Signed-off-by: Nageswara R Sastry <rnsastry@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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doc/device-tree/tpm.rst
changed firwmare to firmware
libstb/stb.h
added missing functional parameter
Signed-off-by: Nageswara R Sastry <rnsastry@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds a documentation for the tpm device tree node.
Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds a documentation for the ibm,secureboot device tree node.
Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We can route them to any of 4 PSI interrupts. We use the device-tree
to determine the default routing
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This will provide the global IRQ numbers for all 16 PSI inputs (though
we don't really care about 0 here). We can then express them in the
device-tree as relative to the PSI bridge. Among others, that allows
us to express the external interrupt and the LPC interrupt using a
fixed numbering scheme.
The example device-tree is updated to route them all to the LPC0
input which corresponds to what the LPC code does at the moment.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Instantiate if if it's in the device-tree...
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We currently don't exploit the new MUX that allow to spread them
around different PSI interrupts, they all go to LPC#0
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This reworks interrupt handling a bit and adds support for XIVE
based interrupts and the new sources available on POWER9.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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