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* Create dmi.pll.scan.initfileBen Gass2017-07-147-8/+126
* HCODE: DD21 makefile changes for CME,PGPE and SGPEPrasad Bg Ranganath2017-07-143-11/+20
* p9_hcd_cache_dcc_skewadjust_setupAnusha Reddy Rangareddygari2017-07-141-46/+15
* HW414700 checkstop on UEs and disable core ECC counterLuke C. Murray2017-07-133-2/+36
* Add PERV chiplet to MCGR 0Anusha Reddy Rangareddygari2017-07-131-0/+5
* Change DD2 #if statements to correct SBE conventioncrgeddes2017-07-131-19/+21
* updates to remove TARGET_TYPE_NVMatt K. Light2017-07-121-2/+0
* Quad FIR updates for Nimbus DD2, MPIPLLuke C. Murray2017-07-121-2/+2
* DD2 updated scan overrides, Cumulus DD1 initfile updatesdchowe2017-07-121-0/+25
* mc_pll_bucket attributeAnusha Reddy Rangareddygari2017-07-123-0/+24
* Disabling LVext for all P9 partsLuke C. Murray2017-07-121-18/+0
* dcc skew adjust procedure updateAnusha Reddy Rangareddygari2017-07-123-229/+281
* p9.pci.scan.initfile -- initial releaseJoe McGill2017-07-121-0/+16
* p9.npu.scom.initfile -- Nimbus DD2 updatesJoe McGill2017-07-121-18/+0
* Cumulus proc updatesAnusha Reddy Rangareddygari2017-07-123-47/+98
* Add WA for HW415236Nick Klazynski2017-07-121-0/+17
* PSTATE_PARAMETER_BLOCK structure alignment and error handlingPrasad Bg Ranganath2017-07-121-0/+17
* Add Workarounds for HW415114 HW415013 HW413853 HW414384Nick Klazynski2017-07-121-0/+119
* p9_sbe_chiplet_reset updatesAnusha Reddy Rangareddygari2017-07-121-0/+2
* Update FBC cd_hp initfile to reference serial mode spys directlydchowe2017-07-121-0/+18
* Fix makefile for changed file nameSachin Gupta2017-07-111-1/+1
* p9_{mem,sbe_chiplet}_pll_setup: Level 3Joachim Fenkes2017-07-113-6/+20
* Support for fused core modeSachin Gupta2017-07-111-16/+48
* p9_sbe_select_ex -- add option to skip HB checksJoe McGill2017-07-112-4/+12
* Restore backward compatibilty of SBE image with HB/HWSVSachin Gupta2017-07-071-0/+24
* Adding HW414702 workaround to INT scan initfilesJenny Huynh2017-07-031-0/+18
* Add WAs for HW413799 HW413853 HW413917 HW414249 HW414375 HW414871 HW414829Nick Klazynski2017-07-031-0/+119
* Update p9_sbe_chiplet_reset to support MV GSD2PIBAbhishek Agarwal2017-07-031-0/+2
* p9_sbe_select_ex -- skip new checks for b_single=falseJoe McGill2017-07-031-2/+2
* p9_sbe_select_ex: add fused core booting supportGreg Still2017-07-033-40/+144
* Base infra for PM FFDC extraction of PPE stateAmit Tendolkar2017-07-011-0/+65
* Dummy commit to enable optimized ppe ffdc collection on SBEAmit Tendolkar2017-07-017-0/+952
* PM: Fix for cyclic inclusion of header files.Prem Shanker Jha2017-06-302-1/+2
* Callback for dropping Quad Atomic LockAmit Tendolkar2017-06-302-14/+43
* Dummy commit to enable mirroring new files from gerrit review 41599 into HBAmit Tendolkar2017-06-302-0/+155
* STOP: Restore MSR in UIH hookYue Du2017-06-301-0/+5
* Adding PK_TRACE_PERF as a way to easily enable latency testingJuan Medina2017-06-301-0/+10
* PCIe updates for Nimbus DD2 GEN4 operationJoe McGill2017-06-292-1/+23
* Fix DD LEVEL to support minor ECsMichael Floyd2017-06-292-2/+2
* Improve power and clock checking when checking for stop statesBrian Vanderpool2017-06-292-8/+45
* Adding a static method to get scom failure addressspashabk-in2017-06-261-0/+12
* p9.core.scan.initfile -- set disable 241 for Nimbus DD2Joe McGill2017-06-261-3/+3
* Fill empty descriptions with placeholdercrgeddes2017-06-261-14/+14
* L3 update -- p9_suspend_ioThi Tran2017-06-264-123/+105
* p9_sbe_common_errors.xmlAnusha Reddy Rangareddygari2017-06-231-4/+1
* p9_tp_stopclocks: Don't raise CFAM FENCE2 to keep PERV chiplet accessibleJoachim Fenkes2017-06-231-1/+1
* L3 update -- p9_sbe_instruct_startThi Tran2017-06-232-12/+11
* p9_sbe_tp_chiplet_init1: Set TP_TCPERV_SRAM_ENABLE_DCJoe Dery2017-06-231-0/+5
* Propagate "fused_core" IPL option into PU chipJoachim Fenkes2017-06-233-3/+22
* p9_ringID -- rework OBUS IDs to preserve GPTR/REPR ringIdsJoe McGill2017-06-233-144/+143
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