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| author | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-06 12:33:32 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-07 03:47:51 -0400 |
| commit | bee7283419489e911b3e2f44ca96bf1ac12264e5 (patch) | |
| tree | 6e0d89787031498860db89fc1d48388616f87367 /src/import | |
| parent | bed2ff6802182156ce5346102cc6ad9ef9664a52 (diff) | |
| download | talos-sbe-bee7283419489e911b3e2f44ca96bf1ac12264e5.tar.gz talos-sbe-bee7283419489e911b3e2f44ca96bf1ac12264e5.zip | |
Restore backward compatibilty of SBE image with HB/HWSV
Change-Id: I2eba38a5d5a254c9595ee49e56f65b6c7ded67a6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42819
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42822
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C index 03f15303..bf7b1299 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.C @@ -233,6 +233,30 @@ fapi2::ReturnCode p9_sbe_attr_setup(const l_read_scratch_reg.extractToRight<ATTR_OB2_PLL_BUCKET_STARTBIT, ATTR_OB2_PLL_BUCKET_LENGTH>(l_ob2_pll_bucket); l_read_scratch_reg.extractToRight<ATTR_OB3_PLL_BUCKET_STARTBIT, ATTR_OB3_PLL_BUCKET_LENGTH>(l_ob3_pll_bucket); + // Workaround to handle backward compatibilty + // Old drivers will keep MBX OBUS PLL bucket value as zero. So + // change it to 1 to make old drivers compatible with new SBE + // image + if( 0 == l_ob0_pll_bucket ) + { + l_ob0_pll_bucket = 1; + } + + if( 0 == l_ob1_pll_bucket ) + { + l_ob1_pll_bucket = 1; + } + + if( 0 == l_ob2_pll_bucket ) + { + l_ob2_pll_bucket = 1; + } + + if( 0 == l_ob3_pll_bucket ) + { + l_ob3_pll_bucket = 1; + } + FAPI_DBG("Setting up ATTR_I2C_BUS_DIV_REF"); FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_I2C_BUS_DIV_REF, i_target_chip, l_read_4)); |
