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* enforce strict 512 GB per socket limit on Witherspoon memory map (part2)Joe McGill2018-02-122-3/+6
* enforce strict 512 GB per socket limit on Witherspoon memory mapJoe McGill2018-02-121-3/+3
* write_whitelist add for I2C Engine and Lock / UnLock.Srikantha Meesala2018-02-121-0/+2
* p9.npu.scom.initfile -- limit DCP0 credits for HW437173Joe McGill2018-02-111-0/+18
* Updating HW414700 to also apply to Cumulus DD10Jenny Huynh2018-02-111-2/+9
* Revert "p9_sbe_npll_setup: Enable Spread Spectrum right after SS PLL lock""Sachin Gupta2018-02-102-5/+97
* PM: Generation of summarized version of STOP Recovery FFDC.Prem Shanker Jha2018-02-103-3/+6
* Add VPD lookup to build a supported frequency list, and bin-down supportAndre Marin2018-02-081-3/+4
* Additional risk level support - (step 1) Backward compatibilityClaus Michael Olsen2018-02-089-72/+300
* update OBUS PLL buckets for p9n dd22, p9c dd11Joe McGill2018-02-081-6/+6
* Moving DD specific ring coord from TOR to XIP (step 2)Claus Michael Olsen2018-02-083-20/+86
* CME Code Size Reduction ATTEMPT#3Michael Floyd2018-02-074-20/+39
* cresp address error handling updatesJoe McGill2018-02-011-1/+24
* Two LTPTR workarounds, remove LTPTR serialization, Fix TB IMCNick Klazynski2018-02-011-18/+32
* p9_build_smp -- use ADU chipops to switch fabric configuration part #2Joe McGill2018-01-301-1/+4
* shift XBUS FIR programming inits for secure bootJoe McGill2018-01-261-1/+127
* Remove workaround for DD1 SW reset for XIVESachin Gupta2018-01-264-292/+22
* Make SBE errors recoverable - p9_sbe_commonSoma BhanuTej2018-01-261-3/+3
* p9_xbus_fir_utils.H -- create header for definition of XBUS related FIR settingsJoe McGill2018-01-251-0/+97
* HDCT: Remove core trace arrays, permanent P9 erratumJoachim Fenkes2018-01-251-3/+4
* Moving DD specific ring coord from TOR to XIP (step 1)Sumit Kumar2018-01-239-208/+342
* Implement security IMCs, based on v29 of wikiNick Klazynski2018-01-231-6/+149
* P9 SBE EOL Toggle SBE ProcedureChris Steffen2018-01-232-0/+153
* SW413281: Whilisting address for putscom according to HDCT.txtSunil Kumar2018-01-231-5/+5
* Secure Boot: Add p9_setup_dpll_values scom registers to whitelistNick Bofferding2018-01-221-1/+2
* p9_dd_container: Introducing DD container API lib to PPE repoClaus Michael Olsen2018-01-221-1/+1
* STOP: Fix PLS deepest when stop4+ due to self restore wakeupYue Du2018-01-221-0/+1
* PM: VDM Prolonged Droop FixRahul Batra2018-01-191-1/+16
* Add new TM IMC, Add TLBIE hangbusterNick Klazynski2018-01-191-0/+24
* EKB side of changes for attributeOverride tool in x86.nfp contextMatt Derksen2018-01-191-1/+4
* Register FFDC call is handled within machine_check_handlerRaja Das2018-01-191-4/+5
* Fix three NDD2.1 dials and add new NDD2.2 workaroundsNick Klazynski2018-01-171-14/+189
* Zepplin:Remove dd level check for cumulus under PPB codePrasad Bg Ranganath2018-01-141-7/+0
* Add FABRIC_PRESENT_GROUPS system attributeChristian Geddes2018-01-141-1/+17
* PM: Ignore allow_reg_wakeup in cache contained modeBrian Vanderpool2018-01-141-0/+28
* Workaround for Quaint Gate, Angry ReindeerJenny Huynh2018-01-141-4/+29
* xip_customize and TOR API: Improved DD level verificationClaus Michael Olsen2018-01-145-22/+30
* jgr171017 Setting changes for Obus boardwire vs cableJohn Rell2018-01-141-0/+24
* Large update for securityNick Klazynski2018-01-141-3/+26
* Disable read data delay for Cumulus DD1.0, enable for DD1.1Joe McGill2018-01-141-0/+17
* p9_sbe_chiplet_reset: Remove SIM_ONLY conditional around delayJoachim Fenkes2018-01-131-3/+1
* apply rings from Centaur HW imageJoe McGill2018-01-133-109/+141
* Workaround for Warlike Parasite (HW430546)Lennard Streat2018-01-131-0/+18
* fix ADU setup for MCD disabled operationJoe McGill2018-01-131-2/+2
* p9_build_smp -- use ADU chipops to switch fabric configuration part #1Thi Tran2018-01-134-21/+124
* Overlays and multi-DD XIP related updates to xip_image and dd_containerClaus Michael Olsen2018-01-131-19/+23
* p9_sbe_tp_chiplet_init3: Honor PCI osc selection when checking for osc errorsJoachim Fenkes2018-01-121-8/+12
* MCD disable workaround for HW423589 (option1)Joe McGill2018-01-124-5/+73
* SW410723 chiplet ID range for address 107D0 is increased to 0x37.Sunil Kumar2018-01-121-1/+1
* Solve compilation issue for type castingSachin Gupta2018-01-101-2/+2
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