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| author | Brian Vanderpool <vanderp@us.ibm.com> | 2018-01-03 08:09:24 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-14 11:41:42 -0500 |
| commit | 6f1c9f559f3dc95543f6ac677207bc720106aabb (patch) | |
| tree | e733465a869c8a67fcb95f411f6bb985787e08e2 /src/import | |
| parent | 0d217e279a9dc458ccb7b7b45c13135d31d76ee5 (diff) | |
| download | talos-sbe-6f1c9f559f3dc95543f6ac677207bc720106aabb.tar.gz talos-sbe-6f1c9f559f3dc95543f6ac677207bc720106aabb.zip | |
PM: Ignore allow_reg_wakeup in cache contained mode
Key_Cronus_Test=PM_REGRESS
Change-Id: If2916c99b37c4ce56ad1cf6f6957d67497fac5ab
CQ: SW412668
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51394
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Dev-Ready: Brian T. Vanderpool <vanderp@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51471
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index de7c51fb..202f1ac1 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -4639,6 +4639,34 @@ </chipEcFeature> </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_BLOCK_REG_WAKEUP_DISABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD2.2 / Cumulus DD1.1 - There is better fencing on the block wakeup signal + from the core ppm, so the CME logic thinks it needs to block interrupts to PC. + This sets an override to ignore the fenced off signal + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x22</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x11</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + + <attribute> <id>ATTR_CHIP_EC_FEATURE_CXA_P9NDD1_SPY_NAMES</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> |
