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| author | Nick Klazynski <jklazyns@us.ibm.com> | 2017-12-13 12:34:30 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-14 07:47:57 -0500 |
| commit | 57ab16ed1e8cebde3ffa3ce5e2a8c29381a5c3b5 (patch) | |
| tree | 7d9e4d7e016b1411d92b352cb4e2dccd3690df4d /src/import | |
| parent | db3e87fc93421b198a4472d8617b542136a4b4a7 (diff) | |
| download | talos-sbe-57ab16ed1e8cebde3ffa3ce5e2a8c29381a5c3b5.tar.gz talos-sbe-57ab16ed1e8cebde3ffa3ce5e2a8c29381a5c3b5.zip | |
Large update for security
- IMC6 changed to implement special nop
- IMC7 serializes bcctr for NDD2.2/CDD1.1
- mttrig2 moved to mttrig0
- mttrig2 now causes an L1 flush on NDD2.2/CDD1.1
- Force private L1D
- branch hint bits always honored
- enable new TM mode for NDD2.2
Change-Id: I3b724f6d742b9ba321ea1abbfa6bbc7d5482b8ed
CQ: HW430733
CQ: SW410726
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50872
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51025
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index c9b0c5f0..dafa06dd 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -58,6 +58,30 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW430733</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD2.2 / Cumulus DD1.1 - Serialize bcctr[l] + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x22</value> + <test>EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x11</value> + <test>EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW420171</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -143,10 +167,10 @@ </attribute> <!-- ********************************************************************* --> <attribute> - <id>ATTR_CHIP_EC_FEATURE_LEGACYTMMODE</id> + <id>ATTR_CHIP_EC_FEATURE_NEW_TM_MODE</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Legacy TM mode - Will be replaced with full solution after bringup + Enable new TM handling for NDD2.2 </description> <chipEcFeature> <chip> @@ -217,7 +241,6 @@ </chip> </chipEcFeature> </attribute> - <!-- ********************************************************************* --> <attribute> <id>ATTR_CHIP_EC_FEATURE_P9_NO_NDL_IOVALID</id> |
