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* Skip EQ_CLOCK_STAT_SL scom is we are in stop 11 or greatercrgeddes2018-03-151-19/+21
* Update p9_query_cache_access_state to use the correct scom registercrgeddes2018-03-141-2/+2
* p9_query_cache_access_state L2CHRISTINA L. GRAVES2018-03-141-0/+173
* Add p9n 2.3 to p9_frequency_buckets.HBen Gass2018-03-131-0/+7
* Change TP FIR bits 38, 39, 40 as recoverable & MaskedSoma BhanuTej2018-03-131-2/+2
* PM: p9_setup_evid steps voltage to avoid Fleetwood VRM limitationsGreg Still2018-03-131-8/+7
* Update p9_collect_ppe_state to dynamically collect PPE FFDCAmit Tendolkar2018-03-131-2/+2
* Adding attribute to detect which processor we can use for alt-memoryElizabeth Liner2018-03-072-0/+16
* p9_sbe_tracearray -- satsify PRD calls to manage core trace arraysJoe McGill2018-03-071-6/+9
* Fix a couple of EKB files to prevent CMVC quirkaravnair-in2018-03-062-3/+3
* Disable WOF for Cumulus DD1.0Dan Crowell2018-03-051-0/+7
* Enable risklevel2, match v44 of security wikiNick Klazynski2018-03-021-3/+3
* Axone support to TP stopclocksSoma BhanuTej2018-03-025-46/+125
* Axone MC uses same pll/clock setup as in Cumulus.Ben Gass2018-03-011-1/+16
* Update to putRingUtils to proper scanning of perv_pll_bndy_flt ringsClaus Michael Olsen2018-02-282-6/+15
* STOP: Support Suspend Entry/Exit and Fix Pig CollisionYue Du2018-02-281-0/+1
* Add support for p9c 1.2Ben Gass2018-02-236-20/+80
* Add Cumulus DD1.1 initsNick Klazynski2018-02-231-46/+291
* Add EQ ATOMIC LOCK SCOM to security write whitelist for FFDCAmit Tendolkar2018-02-231-0/+1
* PM_SPWKUP: Clear wakeup notify select bit to enable auto special wakeupGreg Still2018-02-221-1/+11
* LPC: Add empty files for mirroring to HB, PPE, HWSVJoachim Fenkes2018-02-222-0/+50
* Additional risk level support - (step 2) Updating the image w/RL2Claus Michael Olsen2018-02-172-16/+3
* Updating NCU tlbie pacing dialsLuke C. Murray2018-02-171-4/+4
* Add attribute to give platform more control over PM_RESETChristian Geddes2018-02-161-1/+17
* hwpErrors: Use wildcard instead of explicit listJoachim Fenkes2018-02-162-88/+2
* Protect Firmware from exposure to HW423533Lennard Streat2018-02-151-0/+18
* Add TM WAT workaround; NDD2.2 and CDD1.1 onlyNick Klazynski2018-02-151-0/+24
* Disabling WOF and VDM for Nimbus DD2.0Dan Crowell2018-02-151-2/+2
* Re-submit Axone updatesBen Gass2018-02-155-38/+267
* FIR + RAS XML updatesJoe McGill2018-02-151-2/+2
* Mask TP LFIR for non PPE mode - p9_sbe_commonSoma BhanuTej2018-02-151-1/+9
* Extend PM Reset flow to collect PM FFDC to HOMERAmit Tendolkar2018-02-152-2/+51
* Bug fix to TOR API to not check TOR header version against TOR_VERSIONClaus Michael Olsen2018-02-141-1/+0
* Enable mixed core xlate; Enable xlate protection feature; Disable LSU clockgateNick Klazynski2018-02-131-0/+72
* Fix to TOR API failure on 32b systemsClaus Michael Olsen2018-02-131-1/+6
* Secure Boot: Blacklist: Finalize SBE white/blacklistNick Bofferding2018-02-121-31/+7
* enforce strict 512 GB per socket limit on Witherspoon memory map (part2)Joe McGill2018-02-122-3/+6
* enforce strict 512 GB per socket limit on Witherspoon memory mapJoe McGill2018-02-121-3/+3
* write_whitelist add for I2C Engine and Lock / UnLock.Srikantha Meesala2018-02-121-0/+2
* p9.npu.scom.initfile -- limit DCP0 credits for HW437173Joe McGill2018-02-111-0/+18
* Updating HW414700 to also apply to Cumulus DD10Jenny Huynh2018-02-111-2/+9
* Revert "p9_sbe_npll_setup: Enable Spread Spectrum right after SS PLL lock""Sachin Gupta2018-02-102-5/+97
* PM: Generation of summarized version of STOP Recovery FFDC.Prem Shanker Jha2018-02-102-2/+4
* Additional risk level support - (step 1) Backward compatibilityClaus Michael Olsen2018-02-084-41/+31
* update OBUS PLL buckets for p9n dd22, p9c dd11Joe McGill2018-02-081-6/+6
* Moving DD specific ring coord from TOR to XIP (step 2)Claus Michael Olsen2018-02-082-19/+72
* CME Code Size Reduction ATTEMPT#3Michael Floyd2018-02-074-20/+39
* cresp address error handling updatesJoe McGill2018-02-011-1/+24
* Two LTPTR workarounds, remove LTPTR serialization, Fix TB IMCNick Klazynski2018-02-011-18/+32
* p9_build_smp -- use ADU chipops to switch fabric configuration part #2Joe McGill2018-01-301-1/+4
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