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authorSoma BhanuTej <soma.bhanu@in.ibm.com>2018-02-01 03:30:20 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2018-03-02 01:17:32 -0500
commitace2c563f607cd1aabf3b0daa82bc9112135e35d (patch)
tree9d8d92c7f64f1fd42cc6d25d043de84445aa62aa /src/import/chips/p9
parent2b432b15cbe828715645dc069e81b66c1a51a4f4 (diff)
downloadtalos-sbe-ace2c563f607cd1aabf3b0daa82bc9112135e35d.tar.gz
talos-sbe-ace2c563f607cd1aabf3b0daa82bc9112135e35d.zip
Axone support to TP stopclocks
Change-Id: I0960ec588156f3df3f863b6c5fa41bbed95e089e RTC: 183048 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53139 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: NAGENDRA K. GURRAM <nagendra.g@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53152 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C14
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C132
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml17
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml4
5 files changed, 125 insertions, 46 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C
index 83e5dbd1..c506afea 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -59,20 +59,28 @@ enum P9_common_stopclocks_Private_Constants
/// --Clear abstclk muxsel & Set syncclk_muxsel
///
/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
+/// @param[in] i_regions Input clock regions
/// @return FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode p9_common_stopclocks_cplt_ctrl_action_function(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
+ const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, fapi2::buffer<uint64_t> i_regions)
{
// Local variable and constant definition
fapi2::buffer <uint16_t> l_cplt_ctrl_init;
fapi2::buffer<uint16_t> l_attr_pg;
+ fapi2::buffer<uint16_t> l_regions;
fapi2::buffer<uint64_t> l_data64;
+
FAPI_INF("Entering p9_common_stopclocks_cplt_ctrl_action_function...");
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg));
l_attr_pg.invert();
- l_attr_pg.extractToRight<4, 11>(l_cplt_ctrl_init);
+ FAPI_DBG("Masking with regions bits enabled : %#018lX ", i_regions);
+ i_regions.extractToRight<53, 11>(l_regions);
+ l_regions = (l_attr_pg >> 1) & l_regions;
+ FAPI_DBG("Effective l_regions : %#06lX", l_regions);
+
+ l_regions.extractToRight<5, 11>(l_cplt_ctrl_init);
FAPI_DBG("Raise partial good fences");
//Setting CPLT_CTRL1 register value
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H
index 548fd9a1..b7dfeeb3 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -43,7 +43,7 @@
#include <fapi2.H>
fapi2::ReturnCode p9_common_stopclocks_cplt_ctrl_action_function(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
+ const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, fapi2::buffer<uint64_t> i_regions = 0xFFFFFFFFFFFFFFFF);
fapi2::ReturnCode p9_common_stopclocks_raise_fence(
const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C
index add2685d..06c108a6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -52,42 +52,53 @@ enum P9_TP_STOPCLOCKS_Private_Constants
DONT_STARTMASTER = 0x0,
DONT_STARTSLAVE = 0x0,
REGIONS_ONLY_PIB_NET = 0x300,
+ REGIONS_ONLY_PIB_NET_SBE = 0x320,
REGIONS_ALL_EXCEPT_PIB_NET = 0x4FF,
+ REGIONS_ALL_EXCEPT_PIB_NET_SBE = 0x4DF,
REGIONS_ALL_INCLUDING_PLL = 0x7FF,
STARTMASTER = 0x1,
STARTSLAVE = 0x1
};
fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip,
- const bool i_stop_tp_clks, const bool i_stop_pib_clks)
+ const bool i_stop_tp_clks,
+ const bool i_stop_pib_clks //Axone: PIB, NET & SBE clocks; Nimbus & Cumulus: PIB & NET clocks
+ )
{
fapi2::buffer<uint64_t> l_clock_regions;
fapi2::buffer<uint32_t> l_data32;
fapi2::buffer<uint32_t> l_data32_root_ctrl0;
+ fapi2::buffer<uint8_t> l_is_axone;
FAPI_INF("p9_tp_stopclocks: Entering ...");
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9A_STOPCLOCKS, i_target_chip, l_is_axone));
+
+ FAPI_INF("p9_tp_stopclocks: Input arguments \n\t i_stop_tp_clks = %s \n\t i_stop_pib_clks = %s \n\t Axone_chip = %s",
+ btos(i_stop_tp_clks), btos(i_stop_pib_clks), btos(l_is_axone));
+
if(!(i_stop_tp_clks || i_stop_pib_clks)) //Atleast one must be TRUE
{
- FAPI_INF("p9_tp_stopclocks: Input arguments \n\t i_stop_tp_clks = %s \n\t i_stop_pib_clks = %s", btos(i_stop_tp_clks),
- btos(i_stop_pib_clks));
FAPI_ERR("p9_tp_stopclocks: Calling stopclocks without selecting any regions\n\t --> Skipping TP Stopclocks..! <--");
+ fapi2::current_err = fapi2::FAPI2_RC_INVALID_PARAMETER;
goto fapi_try_exit;
}
-#ifdef __PPE__
-
if(i_stop_pib_clks)
{
- FAPI_ERR("p9_tp_stopclocks: Calling TP stopclocks for PIB & NET regions in SBE mode is INVALID\n\t --> Skipping TP Stopclocks for PIB/NET regions..! <--");
- goto fapi_try_exit;
- }
-
-#endif
+#ifdef __PPE__
-#ifndef __PPE__
+ if(l_is_axone)
+ {
+ FAPI_ERR("p9_tp_stopclocks: Calling TP stopclocks for PIB, NET & SBE regions in SBE mode is INVALID\n\t --> Skipping TP Stopclocks for PIB/NET/SBE regions..! <--");
+ }
+ else
+ {
+ FAPI_ERR("p9_tp_stopclocks: Calling TP stopclocks for PIB & NET regions in SBE mode is INVALID\n\t --> Skipping TP Stopclocks for PIB/NET regions..! <--");
+ }
- if(i_stop_pib_clks)
- {
+ fapi2::current_err = fapi2::FAPI2_RC_INVALID_PARAMETER;
+ goto fapi_try_exit;
+#else
FAPI_DBG("p9_tp_stopclocks: Raise chiplet fence");
//Setting PERV_CTRL0 register value
FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_data32));
@@ -103,28 +114,71 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_PIB2PCB_DC>();
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI,
l_data32_root_ctrl0));
- }
+
+ if(l_is_axone)
+ {
+ FAPI_DBG("p9_tp_stopclocks: Enabling PCB_RESET");
+ //CFAM.ROOT_CTRL0.PERV_ROOT_CTRL0_PCB_RESET_DC = 1
+ l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_PCB_RESET_DC>();
+ FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0));
+
+ FAPI_DBG("p9_tp_stopclocks: Switching off PIB2PCB & PCB2PCB path");
+ l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_18_SPARE_MUX_CONTROL>();
+ l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_19_SPARE_MUX_CONTROL>();
+ FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0));
+
+ FAPI_DBG("p9_tp_stopclocks: Clear PCB_RESET");
+ //CFAM.ROOT_CTRL0.PERV_ROOT_CTRL0_PCB_RESET_DC = 0
+ l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_PCB_RESET_DC>();
+ FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0));
+ }
#endif
+ }
+ //Configuring Clock regions that needs to be clockstopped
if(i_stop_tp_clks && i_stop_pib_clks)
{
FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ALL_INCLUDING_PLL");
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(
- i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
- fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_INCLUDING_PLL, l_clock_regions));
- FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions);
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
+ fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_INCLUDING_PLL, l_clock_regions));
+ }
+ else if(i_stop_tp_clks && !i_stop_pib_clks)
+ {
+ if(l_is_axone)
+ {
+ FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ALL_EXCEPT_PIB_NET_SBE");
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
+ fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_EXCEPT_PIB_NET_SBE, l_clock_regions));
+ }
+ else
+ {
+ FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ALL_EXCEPT_PIB_NET");
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
+ fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_EXCEPT_PIB_NET, l_clock_regions));
+ }
}
- else if(i_stop_tp_clks)
+ else if(!i_stop_tp_clks && i_stop_pib_clks)
{
- FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ALL_EXCEPT_PIB_NET");
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(
- i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
- fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_EXCEPT_PIB_NET, l_clock_regions));
- FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions);
+ if(l_is_axone)
+ {
+ FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ONLY_PIB_NET_SBE");
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
+ fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ONLY_PIB_NET_SBE, l_clock_regions));
+ }
+ else
+ {
+ FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ONLY_PIB_NET");
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
+ fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ONLY_PIB_NET, l_clock_regions));
+ }
}
- if(!i_stop_tp_clks && i_stop_pib_clks) //Using CBS interface to stop clock in PIB & NET
+ FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions);
+
+
+
+ if((!i_stop_tp_clks && i_stop_pib_clks) && !l_is_axone) //Using CBS interface to stop clock
{
FAPI_DBG("p9_tp_stopclocks: Call module clock start stop for PIB, NET only");
FAPI_TRY(p9_common_stopclocks_pib_net_clkstop(i_target_chip));
@@ -132,29 +186,25 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
else
{
FAPI_DBG("p9_tp_stopclocks: Call module clock start stop for TP chiplet");
- FAPI_TRY(p9_sbe_common_clock_start_stop(
- i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
- fapi2::TARGET_STATE_FUNCTIONAL)[0], CLOCK_CMD, DONT_STARTSLAVE, DONT_STARTMASTER,
- l_clock_regions, CLOCK_TYPES));
-
- FAPI_DBG("p9_tp_stopclocks: Assert vital fence and set flush_inhibit");
- FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode(
- i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
- fapi2::TARGET_STATE_FUNCTIONAL)[0]));
-
- FAPI_DBG("p9_tp_stopclocks: Raise partial good fences and set abist_muxsel, syncclk_muxsel");
- FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function(
- i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
- fapi2::TARGET_STATE_FUNCTIONAL)[0]));
+ FAPI_TRY(p9_sbe_common_clock_start_stop(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP,
+ fapi2::TARGET_STATE_FUNCTIONAL)[0], CLOCK_CMD, DONT_STARTSLAVE, DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
}
+ FAPI_DBG("p9_tp_stopclocks: Assert vital fence and set flush_inhibit");
+ FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+ (fapi2::TARGET_FILTER_TP, fapi2::TARGET_STATE_FUNCTIONAL)[0]));
+
+ FAPI_DBG("p9_tp_stopclocks: Raise partial good fences and set abist_muxsel, syncclk_muxsel");
+ FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function(i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+ (fapi2::TARGET_FILTER_TP, fapi2::TARGET_STATE_FUNCTIONAL)[0], l_clock_regions));
+
#ifndef __PPE__
if(i_stop_pib_clks)
{
FAPI_DBG("p9_tp_stopclocks: Assert CFAM fences");
//Setting ROOT_CTRL0 register
- //CFAM.ROOT_CTRL0.FENCE[0..6]_DC = 1
+ //CFAM.ROOT_CTRL0.FENCE[0,1,3..6]_DC = 1
l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE0_DC>();
l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE1_DC>();
// Not raising PERV_ROOT_CTRL0_FENCE2_DC because we need FSI2PIB <- PERV EPS connectivity
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index a73adb95..f574ab83 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -6674,6 +6674,23 @@
</attribute>
<!-- ********************************************************************* -->
<attribute>
+ <id>ATTR_CHIP_EC_FEATURE_P9A_STOPCLOCKS</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Returns true if stopclocks function usage is for Axone chip
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_AXONE</name>
+ <ec>
+ <value>0x10</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ********************************************************************* -->
+ <attribute>
<id>ATTR_CHIP_EC_FEATURE_IOF0PLL_INITF</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index d222b7a1..63be9e7e 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -550,6 +550,10 @@ attribute tank
<virtual/>
</entry>
<entry>
+ <name>ATTR_CHIP_EC_FEATURE_P9A_STOPCLOCKS</name>
+ <virtual/>
+ </entry>
+ <entry>
<name>ATTR_CHIP_EC_FEATURE_HW404391_SCOM</name>
<virtual/>
</entry>
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