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path: root/src/import/chips/p9/procedures/hwp
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* Support the PIB abort condition on PPE platformCHRISTINA L. GRAVES2017-08-231-32/+45
* Optimise RamCore put_reg & get_regspashabk-in2017-08-231-261/+194
* PGPE TraceAdam Hale2017-08-232-0/+2
* PM: PGPE Flags Struct FixRahul Batra2017-08-231-2/+2
* PM: Remove VDM check from p9_hcd_cache_stopclocksGreg Still2017-08-221-13/+13
* Optimize p9_adu_coherent_utilsspashabk-in2017-08-211-37/+28
* Temp commit to enable manual mirror of new files to ppeAmit Tendolkar2017-08-212-0/+304
* Fix bug in npu quiesce sequencecrgeddes2017-08-181-57/+49
* Clear disable_ppm_writes bit on CPPM register prior to setting PFDLYcrgeddes2017-08-182-0/+8
* Synchronous stopclk procedure for QuadSoma BhanuTej2017-08-167-65/+123
* p9_sbe_lpc_init: Fix LPC bus LRESET for DD2Joachim Fenkes2017-08-162-64/+111
* Use PHB target in p9_phb_check_quiesceSachin Gupta2017-08-141-74/+15
* Update p9_sbe_load_bootloader Hwp to receive the addr-key stash-2Raja Das2017-08-112-1/+35
* p9_sbe_common -- update TP LFIR to match RAS XML v95Joe McGill2017-08-101-1/+1
* L3 Update - p9_ram_core HWPsThi Tran2017-08-082-79/+100
* L3 Update - p9_thread_control HWPThi Tran2017-08-072-245/+195
* L3 update -- p9_sbe_load_bootloaderJoe McGill2017-08-073-359/+558
* Removed GPE halt workaround from p9_pm_check_quiesceSachin Gupta2017-08-021-21/+0
* Use DD1 SW reset for XIVE unit until we get HW reset working in DD2crgeddes2017-07-311-178/+194
* p9_sbe_chiplet_pll_initf: Level 3Joachim Fenkes2017-07-262-3/+3
* p9_sbe_npll_setup: Level 3Joachim Fenkes2017-07-262-4/+4
* p9_sbe_npll_initf: Level 3Joachim Fenkes2017-07-262-3/+3
* p9_hcd_cache_dcc_skewadjust_setup.CAnusha Reddy Rangareddygari2017-07-261-2/+2
* Fixing mmu epsilon write cycles valueJenny Huynh2017-07-261-6/+0
* TP, Nest FIR updates -- DD2 updates to match RAS XMLJoe McGill2017-07-262-9/+21
* p9_sbe_tp_chiplet_init3: Level 3Joachim Fenkes2017-07-252-3/+3
* L3 Update - p9_l2/l3_flush.CThi Tran2017-07-244-207/+170
* Suspend HWP Halted CheckingAdam Hale2017-07-241-58/+72
* p9_sbe_tracearray: Nimbus DD2 updatesJoachim Fenkes2017-07-241-59/+132
* Removed unnecessary FFDCSachin Gupta2017-07-201-11/+1
* Istep4: procedures upgrade to level3Yue Du2017-07-2056-706/+527
* p9_sbe_check_master_stop15: Level 3Joachim Fenkes2017-07-203-10/+17
* Add pm_check_quiesce function to list of sbe_check_quiesce functioncrgeddes2017-07-192-0/+65
* Optimized PPE FFDC collection frameworkAmit Tendolkar2017-07-197-184/+145
* PGPE: WOF Phase 2Rahul Batra2017-07-191-0/+18
* NMMU FIR, RAS XML updates for Nimbus DD2Joe McGill2017-07-191-18/+18
* updates for thread control, ramming with STOP enabledJoe McGill2017-07-192-65/+42
* chip XOR swap -- use absolute fabric group ID to form bootloader load addressJoe McGill2017-07-194-11/+25
* Have SBE set PSSCR in fused core modeDean Sanner2017-07-171-7/+18
* suspend hwp changes and additional ffdcAdam Hale2017-07-171-118/+82
* p9_query_cache_access_state L2CHRISTINA L. GRAVES2017-07-171-0/+88
* pm suspend methodology and ipc updateAdam Hale2017-07-171-1/+2
* PM: Clear CPMMR PPM_WRITE_DISABLE for suspendBrian Vanderpool2017-07-171-0/+11
* WOF: HWP support for advanced function enablementGreg Still2017-07-171-67/+68
* PSTATE: CME refactoring and cleanupRahul Batra2017-07-171-56/+37
* Pstates/Lab: Add unblocking for DPLL/VRM/VDM/Resclk to pm_suspendBrian Vanderpool2017-07-171-72/+107
* WOF: VRM timing, WOF and VDM enblement attributes additionsPrasad Bg Ranganath2017-07-171-2/+10
* PM: Updated QPMR and SGPE Header with 24x7 offset and length.Prem Shanker Jha2017-07-171-4/+4
* STOP: block wakeup (+ block entry since patch 15)Yue Du2017-07-171-4/+29
* PM: Added support for PGPE Boot/PGPE integrationPrem Shanker Jha2017-07-171-0/+31
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