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-rw-r--r--src/import/chips/p9/procedures/hwp/cache/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H2
31 files changed, 31 insertions, 31 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/Makefile b/src/import/chips/p9/procedures/hwp/cache/Makefile
index a95923ab..475de65e 100644
--- a/src/import/chips/p9/procedures/hwp/cache/Makefile
+++ b/src/import/chips/p9/procedures/hwp/cache/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/cache/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/cache/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk b/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
index f8ae915e..135972bc 100644
--- a/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
index d73007e7..e6f4bdf8 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
index 3b2887c4..683d89ea 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
index 16b97e5b..42eeaa5d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
index 2978337b..f31deedf 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
index 7b55f9ee..82172678 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
index 0cf09244..0ce09b0d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
index 2033f38f..051db751 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
index 8f35b4ed..eeee6c65 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
index 1582c76d..da60602a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
index 64b30d93..7467ee53 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
index 3c48f52a..20a28f27 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
index 0da2ea3b..5674c532 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
index 4a2e620f..f109e02f 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
index 714395cf..d42f1927 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
index 1754c690..08a5b2b7 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
index d0e592a4..198a7034 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
index 24c329f8..233342f6 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
index c5193803..e6130a8a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
index 656616f4..4191244a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
index 5398597e..19116807 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
index 394fb6f6..ccdd3c50 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
index b34ae956..85690d8b 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
index 3712cafb..bc3b1153 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
index 96ce825d..6b8656ff 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
index cc3e8884..08380f50 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
index 38ee4977..8af66306 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
index ded02249..26029adc 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
index a7bc1510..fa20765a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
index d0ad61d6..c5ffc609 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
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