Makefile Infra

Change-Id: I541cbf57945ab77f7e2575745dc2cc6b839687b5
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22362
Tested-by: Jenkins Server
Reviewed-by: Basabjit Sengupta <basengup@in.ibm.com>
Reviewed-by: Amit J. Tendolkar <amit.tendolkar@in.ibm.com>

9 files changed, 96 insertions, 64 deletions

diff --git a/sbe/build/citest/etc/patches/p9n.chip.patch b/sbe/build/citest/etc/patches/p9n.chip.patch
new file mode 100644
index 00000000..ceee66c1
--- /dev/null
+++ b/sbe/build/citest/etc/patches/p9n.chip.patch
@@ -0,0 +1,5 @@
+570a571,574
+> 
+>   # scratch pad register
+>   0x0005003F
+> 
diff --git a/sbe/build/citest/etc/patches/patchlist.txt b/sbe/build/citest/etc/patches/patchlist.txt
index 5bf8c309..0f9ad16e 100644
--- a/sbe/build/citest/etc/patches/patchlist.txt
+++ b/sbe/build/citest/etc/patches/patchlist.txt
@@ -1,6 +1,12 @@
 # Example Format
-Brief description of the problem or reason for patch
--RTC: Task/Story used to remove this patch
--CQ: Defect/Req for checking the changes into fips910
--Files: list of files
--Coreq: list of associated changes, e.g. workarounds.presimsetup
+#Brief description of the problem or reason for patch
+#-RTC: Task/Story used to remove this patch
+#-CQ: Defect/Req for checking the changes into fips910
+#-Files: list of files
+#-Coreq: list of associated changes, e.g. workarounds.presimsetup
+
+RTC:  142706
+Files: P9n.chip. This patch is used to add missing register in scomdef file.
+       As test verification of all isteps, updated scomdef, p9n.chip
+       will be added in CMVC.
+
diff --git a/sbe/build/citest/etc/workarounds.postsimsetup b/sbe/build/citest/etc/workarounds.postsimsetup
index e19a6c02..49053538 100755
--- a/sbe/build/citest/etc/workarounds.postsimsetup
+++ b/sbe/build/citest/etc/workarounds.postsimsetup
@@ -9,3 +9,7 @@
 #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip
 #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $HOSTBOOTROOT/src/build/citest/etc/patches/my_patch_File
 
+echo "+++ Updating p9n.chip file"
+mkdir -p  $sb/simu/data/cec-chip
+cp $BACKING_BUILD/src/simu/data/cec-chip/p9n.chip $sb/simu/data/cec-chip
+patch -p0 $sb/simu/data/cec-chip/p9n.chip $SBEROOT/sbe/build/citest/etc/patches/p9n.chip.patch
diff --git a/sbe/image/Makefile b/sbe/image/Makefile
index d6cbd799..2de83b27 100644
--- a/sbe/image/Makefile
+++ b/sbe/image/Makefile
@@ -63,35 +63,31 @@ HWPLIB_MAKE_DIR := $(HWPLIB_SRCDIR)
 LIB_DIRS += -L$(OBJDIR)/lib
 HWPLIB := $(OBJDIR)/libcommon.a
 LLIBS += -lcommon
-include $(HWPLIB_SRCDIR)/libcommonerrors.mk
+include $(HWPERR_SRCDIR)/hwpErrors.mk
 
 # Common Cache HWP Exit library
 CACHE_MAKE_DIR := $(CACHE_SRCDIR)
 LIB_DIRS += -L$(OBJDIR)/cache
 CACHELIB := $(OBJDIR)/cache/libcache.a
 LLIBS += -lcache
-include $(CACHE_SRCDIR)/cachehcderrors.mk
 
 # Common Core libraries
 CORE_MAKE_DIR := $(CORE_SRCDIR)
 LIB_DIRS += -L$(OBJDIR)/core
 CORELIB := $(OBJDIR)/core/libcore.a
 LLIBS += -lcore
-include $(CORE_SRCDIR)/corehcderrors.mk
 
 # Common Perv libraries
 PERV_MAKE_DIR := $(PERV_SRCDIR)
 LIB_DIRS += -L$(OBJDIR)/perv
 PERVLIB := $(OBJDIR)/perv/libperv.a
 LLIBS += -lperv
-include $(PERV_SRCDIR)/perverrors.mk
 
 # Common Nest libraries
 NEST_MAKE_DIR := $(NEST_SRCDIR)
 LIB_DIRS += -L$(OBJDIR)/nest
 NESTLIB := $(OBJDIR)/nest/libnest.a
 LLIBS += -lnest
-include $(NEST_SRCDIR)/nesterrors.mk
 
 SBE_TOOLS := $(TOOLS_IMAGE_DIR)/sbe_xip_tool $(TOOLS_IMAGE_DIR)/sbe_default_tool
 
@@ -197,19 +193,21 @@ buildInfo:
 #Create an obj directory if needed
 $(LINK_OBJS) $(OBJS) $(OBJS:.o=.d) $(OBJDIR)/base_sbe_fixed.o $(OBJDIR)/base_sbe_fixed.d: | $(OBJDIR)
 
-ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/perv_attributes.xml
+ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/pg_attributes.xml
 ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/pervasive_attributes.xml
-ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/proc_attributes.xml
-ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/ex_attributes.xml
-ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/eq_attributes.xml
+# TODO via RTC 142708
+# Workaound for ATTR_CHIP_UNIT_POS. Remove Mirror_WA_attributes.xml once fapi
+# support is in.
+ATTRFILES += $(IMPORT_XML_DIR)/../../../../../sbe/image/Mirror_WA_attributes.xml
+ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/p9_sbe_load_bootloader_attributes.xml
 ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/core_attributes.xml
 ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/nest_attributes.xml
 
 $(OBJDIR):
-	$(TOOLS_ATTR_DIR)/ppeParseProcSbeFixed.pl . $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
-	$(TOOLS_ATTR_DIR)/ppeParseAttributeInfo.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_ATTR_DIR)/ppeParseProcSbeFixed.pl . $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
+	$(TOOLS_ATTR_DIR)/ppeParseAttributeInfo.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 	$(TOOLS_ATTR_DIR)/ppeCreateAttrGetSetMacros.pl -path $(TOOLS_ATTR_DIR)/src -inc $(PPE_FAPI2_DIR)/include -src $(PPE_FAPI2_DIR)/src
-	$(TOOLS_ATTR_DIR)/ppeCreateIfAttrService.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_ATTR_DIR)/ppeCreateIfAttrService.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 	mkdir -p $(OBJDIR)
 
 .PHONY: clean topfixedheaders $(PKLIB) $(P2PLIB) $(PPELIB) $(FAPI2LIB) $(CACHELIB) $(CORELIB) $(PERVLIB) $(NESTLIB) $(HWPLIB) buildInfo pibMemAttrSet
@@ -217,16 +215,16 @@ $(OBJDIR):
 #errxml: topfixedheaders attrids platattr attrserv
 
 topfixedheaders:
-	$(TOOLS_ATTR_DIR)/ppeParseProcSbeFixed.pl . $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_ATTR_DIR)/ppeParseProcSbeFixed.pl . $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 
 attrids:
-	$(TOOLS_ATTR_DIR)/ppeParseAttributeInfo.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_ATTR_DIR)/ppeParseAttributeInfo.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 
 platattr:
 	$(TOOLS_ATTR_DIR)/ppeCreateAttrGetSetMacros.pl --path $(TOOLS_ATTR_DIR)/src --inc $(PPE_FAPI2_DIR)/include --src $(PPE_FAPI2_DIR)/src
 
 attrserv:
-	$(TOOLS_ATTR_DIR)/ppeCreateIfAttrService.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_ATTR_DIR)/ppeCreateIfAttrService.pl $(PPE_FAPI2_DIR)/include $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 
 
 #Build macro-specific kernel code
@@ -285,7 +283,7 @@ normalize: $(SBE_TOOLS) $(OBJDIR)/$(IMAGE_SEEPROM_NAME).bin
 	$(TOOLS_IMAGE_DIR)/sbe_xip_tool $(OBJDIR)/$(IMAGE_SEEPROM_NAME).bin normalize
 
 defaultset: $(SBE_TOOLS) $(OBJDIR)/$(IMAGE_SEEPROM_NAME).bin normalize
-	$(TOOLS_IMAGE_DIR)/ppeSetFixed.pl $(TOOLS_IMAGE_DIR) $(BASE_OBJDIR)/$(IMAGE_SEEPROM_NAME).bin $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_IMAGE_DIR)/ppeSetFixed.pl $(TOOLS_IMAGE_DIR) $(BASE_OBJDIR)/$(IMAGE_SEEPROM_NAME).bin $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 
 # Build hwp_error_info.H.  If the script fails then print the contents of
 # the header and then delete whatever garbage the script left to force it to
@@ -330,7 +328,7 @@ tracehash:
 	$(THASH) -c -d $(OBJDIR) -s $(OBJDIR)/trexStringFile
 
 pibMemAttrSet:
-	$(TOOLS_IMAGE_DIR)/ppeSetFixedPibmem.pl $(IMPORT_XML_DIR)/p9_ppe_attributes.xml $(ATTRFILES)
+	$(TOOLS_IMAGE_DIR)/ppeSetFixedPibmem.pl $(IMPORT_XML_DIR)/attribute_info/p9_sbe_attributes.xml $(ATTRFILES)
 
 #clean the kernel directory first, then the application level clean
 clean:
diff --git a/sbe/image/Mirror_WA_attributes.xml b/sbe/image/Mirror_WA_attributes.xml
new file mode 100644
index 00000000..ea4bac8a
--- /dev/null
+++ b/sbe/image/Mirror_WA_attributes.xml
@@ -0,0 +1,11 @@
+<!-- $Id: proc_pll_ring_attributes.xml,v 1.17 2014/11/13 20:14:02 szhong Exp $ -->
+<!-- proc_pll_ring_attributes.xml -->
+<attributes>
+  <attribute>
+    <id>ATTR_CHIP_UNIT_POS</id>
+    <targetType>TARGET_TYPE_PERV</targetType>
+    <description></description>
+    <valueType>uint8</valueType>
+  </attribute>
+  <!-- ********************************************************************* -->
+</attributes>
diff --git a/sbe/image/img_defs.mk b/sbe/image/img_defs.mk
index 00d46b4f..e9a4c87d 100644
--- a/sbe/image/img_defs.mk
+++ b/sbe/image/img_defs.mk
@@ -47,28 +47,33 @@ export IMAGE_SRCDIR = $(abspath .)
 endif
 
 ifndef CACHE_SRCDIR
-export CACHE_SRCDIR = $(abspath ../../hwp/cache)
+export CACHE_SRCDIR = $(abspath ../../import/chips/p9/procedures/hwp/cache)
 endif
 
 ifndef CORE_SRCDIR
-export CORE_SRCDIR = $(abspath ../../hwp/core)
+export CORE_SRCDIR = $(abspath ../../import/chips/p9/procedures/hwp/core)
 endif
 
 ifndef PERV_SRCDIR
-export PERV_SRCDIR = $(abspath ../../hwp/perv)
+export PERV_SRCDIR = $(abspath ../../import/chips/p9/procedures/hwp/perv)
+endif
+
+ifndef HWPERR_SRCDIR
+export HWPERR_SRCDIR = $(abspath ../../import/chips/p9/procedures/xml/error_info)
 endif
 
 ifndef NEST_SRCDIR
-export NEST_SRCDIR = $(abspath ../../hwp/nest)
+export NEST_SRCDIR = $(abspath ../../import/chips/p9/procedures/hwp/nest)
 endif
 
 ifndef HWPLIB_SRCDIR
-export HWPLIB_SRCDIR = $(abspath ../../hwp/lib)
+export HWPLIB_SRCDIR = $(abspath ../../import/chips/p9/procedures/hwp/lib)
 endif
 
 ifndef IMG_INCLUDES
 export IMG_INCLUDES = -I$(IMAGE_SRCDIR) -I$(CACHE_SRCDIR) -I$(CORE_SRCDIR) -I$(PERV_SRCDIR) -I$(NEST_SRCDIR)
 endif
+
 ifndef BASE_OBJDIR
 export BASE_OBJDIR = $(abspath ../obj)
 endif
@@ -88,11 +93,11 @@ export TOOLS_IMAGE_DIR = $(abspath ../../tools/image)
 endif
 
 ifndef IMPORT_XML_DIR
-export IMPORT_XML_DIR = $(abspath ../../importtemp/xml)
+export IMPORT_XML_DIR = $(abspath ../../import/chips/p9/procedures/xml)
 endif
 
 ifndef IMPORT_COMMON_DIR
-export IMPORT_COMMON_DIR = $(abspath ../../importtemp/common)
+export IMPORT_COMMON_DIR = $(abspath ../../import/chips/p9/common)
 endif
 
 ifndef P2P_SRCDIR
@@ -274,11 +279,9 @@ ASFLAGS		= -mppe42
 
 ifdef P2P_ENABLE
 #use this to disable optimizations (fused compare/branch etc.)
-PCP-FLAG    =
-
-#use this to enable optimizations
-#PCP-FLAG =
+PCP-FLAG    =  -b
 endif
+
 ############################################################################
 
 #override the GNU Make implicit rule for going from a .C to a .o
diff --git a/sbe/sbefw/sbecmdiplcontrol.C b/sbe/sbefw/sbecmdiplcontrol.C
index e810d519..542e9304 100644
--- a/sbe/sbefw/sbecmdiplcontrol.C
+++ b/sbe/sbefw/sbecmdiplcontrol.C
@@ -49,6 +49,10 @@
 // Core HWP header file
 #include "p9_hcd_core.H"
 
+// istep 5 hwp header files
+#include "p9_sbe_instruct_start.H"
+#include "p9_sbe_load_bootloader.H"
+
 // Forward declaration
 using namespace fapi2;
 ReturnCode sbeExecuteIstep (uint8_t i_major, uint8_t i_minor);
@@ -65,13 +69,11 @@ typedef ReturnCode (*sbeIstep_t)( sbeIstepHwp_t );
 // Wrapper function which will call HWP with Proc target.
 ReturnCode istepWithProc( sbeIstepHwp_t i_hwp );
 ReturnCode istepNoOp( sbeIstepHwp_t i_hwp );
-
-ReturnCode istepWithEx( sbeIstepHwp_t i_hwp);
-
 ReturnCode istepWithEq( sbeIstepHwp_t i_hwp);
 ReturnCode istepWithCore( sbeIstepHwp_t i_hwp);
-//structure for mapping SBE wrapper and HWP functions
+ReturnCode istepLoadBootLoader( sbeIstepHwp_t i_hwp);
 
+//structure for mapping SBE wrapper and HWP functions
 typedef struct
 {
     sbeIstep_t istepWrapper;
@@ -139,7 +141,12 @@ static istepMap_t g_istep3PtrTbl[ ISTEP3_MAX_SUBSTEPS ] =
              { &istepWithProc, (sbeIstepHwp_t)&p9_sbe_fabricinit },
              { &istepNoOp, NULL }, // TODO via RTC 120752
                                    // FW proc_sbe_check_master
-             { &istepWithProc, (sbeIstepHwp_t)&p9_sbe_mcs_setup },
+             // TODO via RTC 142710
+             // mcs_setup does not compile currently as MI target support
+             // is not present. So currently this istep has neem made NoOp
+             // in this code
+             //{ &istepWithProc, (sbeIstepHwp_t)&p9_sbe_mcs_setup },
+             { &istepNoOp, NULL }, // mcs_setup does not compile currently
              { &istepWithProc, (sbeIstepHwp_t)&p9_sbe_select_ex },
          };
 static istepMap_t g_istep4PtrTbl[ ISTEP4_MAX_SUBSTEPS ] =
@@ -149,14 +156,14 @@ static istepMap_t g_istep4PtrTbl[ ISTEP4_MAX_SUBSTEPS ] =
              { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_gptr_time_initf },
              { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_dpll_setup },
              { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_chiplet_init },
-             { &istepWithEx, (sbeIstepHwp_t )&p9_hcd_cache_repair_initf },
-             { &istepWithEx, (sbeIstepHwp_t )&p9_hcd_cache_arrayinit },
+             { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_repair_initf },
+             { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_arrayinit },
              { &istepNoOp, NULL },  // DFT Only
              { &istepNoOp, NULL },  // DFT Only
-             { &istepWithEx, (sbeIstepHwp_t )&p9_hcd_cache_initf },
-             { &istepWithEx, (sbeIstepHwp_t )&p9_hcd_cache_startclocks },
-             { &istepWithEx, (sbeIstepHwp_t )&p9_hcd_cache_scominit },
-             { &istepWithEx, (sbeIstepHwp_t )&p9_hcd_cache_scomcust },
+             { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_initf },
+             { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_startclocks },
+             { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_scominit },
+             { &istepWithEq, (sbeIstepHwp_t )&p9_hcd_cache_scomcust },
              { &istepNoOp, NULL }, // Runtime only
              { &istepNoOp, NULL }, // Runtime only
              { &istepNoOp, NULL }, // stub for SBE
@@ -186,8 +193,8 @@ static istepMap_t g_istep4PtrTbl[ ISTEP4_MAX_SUBSTEPS ] =
 //  Add the support for istep 5 HWP
 static istepMap_t g_istep5PtrTbl[ ISTEP5_MAX_SUBSTEPS ]
          {
-             { &istepNoOp, NULL },
-             { &istepNoOp, NULL },
+             { &istepLoadBootLoader, NULL },
+             { &istepWithCore, (sbeIstepHwp_t )&p9_sbe_instruct_start },
          };
 
 // Functions
@@ -404,19 +411,6 @@ ReturnCode istepWithProc( sbeIstepHwp_t i_hwp)
 
 //----------------------------------------------------------------------------
 
-ReturnCode istepWithEx( sbeIstepHwp_t i_hwp)
-{
-    fapi2::Target<fapi2::TARGET_TYPE_EX > ex10_target((uint64_t)10);
-    SBE_DEBUG("istepWithEx");
-    ReturnCode rc = FAPI2_RC_SUCCESS;
-    if( i_hwp )
-    {
-        rc = i_hwp(ex10_target);
-    }
-    return rc;
-}
-
-//----------------------------------------------------------------------------
 
 ReturnCode istepWithEq( sbeIstepHwp_t i_hwp)
 {
@@ -454,6 +448,17 @@ ReturnCode istepWithCore( sbeIstepHwp_t i_hwp)
 
 //----------------------------------------------------------------------------
 
+ReturnCode istepLoadBootLoader( sbeIstepHwp_t i_hwp)
+{
+    // TODO via RTC 135345
+    //  Send right Ex, address and size of HB loader
+    Target<TARGET_TYPE_PROC_CHIP > proc = plat_getChipTarget();
+    fapi2::Target<fapi2::TARGET_TYPE_EX > exTgt((uint64_t)7);
+    ReturnCode rc = p9_sbe_load_bootloader( proc, exTgt, 0, NULL );
+    return rc;
+}
+
+//----------------------------------------------------------------------------
 ReturnCode istepNoOp( sbeIstepHwp_t i_hwp)
 {
     SBE_DEBUG("istepNoOp");
diff --git a/sbe/test/test.xml b/sbe/test/test.xml
index 1b23623a..505a875e 100755
--- a/sbe/test/test.xml
+++ b/sbe/test/test.xml
@@ -18,6 +18,11 @@
               <simcmd>sim->frontend_current_processor = p9Proc0.sbe.ppe</simcmd>
               <exitonerror>yes</exitonerror>
           </testcase>
+          <!-- Workaround to set clock regs. Once simics have fix, we can remove it -->
+          <testcase>
+            <simcmd>p9Proc0.proc_chip.invoke parallel_store LOGIC 0xffc50000 \"00000000_00000001\" 64</simcmd>
+          </testcase>
+      <!-- Write value to a register and than read it back -->
            <!-- Register SBE tools -->
           <testcase>
               <simcmd>run-python-file targets/p9_nimbus/sbeTest/simics-debug-framework.py</simcmd>
diff --git a/sbe/test/testScom.xml b/sbe/test/testScom.xml
index 01228e2a..2e4bf051 100755
--- a/sbe/test/testScom.xml
+++ b/sbe/test/testScom.xml
@@ -1,10 +1,5 @@
 <?xml version="1.0" encoding="UTF-8"?>
 
-      <!-- Workaround to set clock regs. Once simics have fix, we can remove it -->
-      <testcase>
-          <simcmd>p9Proc0.proc_chip.invoke parallel_store LOGIC 0xffc50000 \"00000000_00000001\" 64</simcmd>
-      </testcase>
-      <!-- Write value to a register and than read it back -->
       <testcase>
           <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPutGetScom.py</simcmd>
           <exitonerror>yes</exitonerror>