| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Allow clock setting on MPC866/MPC885 series chips according to
environment variable `cpuclk'
* Patch by Yuli Barcohen, 20 Apr 2004:
Remove unnecessary redefine of CPM_DATAONLY_SIZE for MPC826x
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* Patch by Brad Parker, 02 Aug 2003:
fix sc520_cdp problems
* Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements)
* Allow erase command to cross flash bank boundaries
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- Correct flash and JFFS2 support for MPC8260ADS
- fix PVR values and clock generation for PowerQUICC II family
(8270/8275/8280)
* Patch by Bernhard Kuhn, 08 Jul 2003:
- add support for M68K targets
* Patch by Ken Chou, 3 Jul:
- Fix PCI config table for A3000
- Fix iobase for natsemi.c
(PCI_BASE_ADDRESS_0 is the IO base register for DP83815)
* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
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- Allow to call sysmon function interactively
- PIC on LWMON board needs delay after power-on
- Add missing RSR definitions for MPC8xx
- Improve log buffer handling: guarantee clean reset after power-on
- Add support for EXBITGEN board
- Add support for SL8245 board
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