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* Raptor manufacturing base image changes for Talos™ IIv2016.07-aspeed-openbmc-04-16-2019Raptor Engineering Development Team2019-04-191-1/+6
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* Move U-Boot control transfer to kernel GPIO on Talos™ II systemsRaptor Engineering Development Team2019-04-191-4/+4
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* Signal U-Boot control transfer to kernel on Talos™ II systemsRaptor Engineering Development Team2019-04-191-0/+12
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* aspeed/flash: Add MT25QL01GB chipAdriana Kobylak2019-04-051-0/+14
| | | | | | | | | The MT25QL01GB is a 128MB NOR flash chip planned to be used on a Witherspoon system (AST2500). Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Tested-by: Adriana Kobylak <anoo@us.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed/ast-scu.c: add ast_get_m_pll_clk() for AST_SOC_G5David Thompson2019-04-042-0/+43
| | | | | | | | | | | | | This code change adds the AST_SOC_G5 version of ast_get_m_pll_clk(), which is relevant to AST1520, AST2500, and AST3200 devices. This change properly enables the AST_SOC_G5 logic in print_cpuinfo(), which can be turned on by defining CONFIG_DISPLAY_CPUINFO. Signed-off-by: David Thompson <dthompson@mellanox.com> Reviewed-by: Shravan Ramani <sramani@mellanox.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* arch-aspeed: Make AHBC and SDMC header guards uniqueAndrew Jeffery2018-07-242-4/+4
| | | | | | | | Otherwise we get mysterious missing symbols if we include both those and the ast-{ahbc,sdmc}.h files. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* ast-g4: Fix typo in board_init() commentAndrew Jeffery2018-07-241-1/+1
| | | | | Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* checkpatch: Fix unescaped brace warningAndrew Jeffery2018-07-241-1/+1
| | | | | | | | | | | | Running checkpatch using Ubuntu 18.04's packaged perl (5.26.1-6ubuntu0.1) gave the following output: Unescaped left brace in regex is deprecated here (and will be fatal in Perl 5.30), passed through in regex; marked by <-- HERE in m/^(\+.*(?:do|\))){ <-- HERE / at ./scripts/checkpatch.pl line 3267 Escape the brace to avoid the warning. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* platform_g5: Disable CONFIG_DDR4_SUPPORT_HYNIXJoel Stanley2018-07-241-1/+1
| | | | | | This maintains the existing behaviour of u-boot on ast2500. Signed-off-by: Joel Stanley <joel@jms.id.au>
* platform_g5: Update to v18Joel Stanley2018-07-121-8/+71
| | | | Signed-off-by: Joel Stanley <joel@jms.id.au>
* platform_g4: Update to v0.62Joel Stanley2018-07-121-2/+10
| | | | Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: Drop bootcmd support for legacy imagesBrad Bishop2018-02-201-5/+1
| | | | | | | | | Assume booting from a FIT image by default. This allows image builders to use arbitrary configuration names like /configurations/conf@foo. Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* net: ftgmac100: Reset FTGMAC100 before setting MACHuy Duong2018-02-131-2/+2
| | | | | | | | | In ftgmac100_initialize(), FTGMAC100 is reset after MACs are set, hence all MACs set before will be erased. This patch moves ftgmac100_reset() to before ftgmac100_set_mac_from_env(). Signed-off-by: Huy Duong <qhuyduong@hotmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* net: Use packed structures for networkingDenis Pynkin2018-02-135-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | PXE boot is broken with GCC 7.1 due option '-fstore-merging' enabled by default for '-O2': BOOTP broadcast 1 data abort pc : [<8ff8bb30>] lr : [<00004f1f>] reloc pc : [<17832b30>] lr : [<878abf1f>] sp : 8f558bc0 ip : 00000000 fp : 8ffef5a4 r10: 8ffed248 r9 : 8f558ee0 r8 : 8ffef594 r7 : 0000000e r6 : 8ffed700 r5 : 00000000 r4 : 8ffed74e r3 : 00060101 r2 : 8ffed230 r1 : 8ffed706 r0 : 00000ddd Flags: nzcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... Core reason is usage of structures for network headers without packed attribute. Reviewed-by: Yauheni Kaliuta <yauheni.kaliuta@redhat.com> Signed-off-by: Denis Pynkin <denis.pynkin@collabora.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> (cherry picked from commit 704f3acfcf55343043bbed01c5fb0a0094a68e8a) Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed/flash: fix buffersize of MX6651235F flash chipRobert Lippert2018-02-131-1/+1
| | | | | | | | | The MX66L51235F had a wrong write buffersize of 512 bytes set which causes issues when trying to write an environment block >256 bytes as the SPI chip only "listens" to the last 256 bytes. Signed-off-by: Robert Lippert <rlippert@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed/timer: move static variables under arch_global_dataCédric Le Goater2017-10-211-2/+4
| | | | | | | | | The timestamp and lastdec variables are under BSS which is a problem as the timer_init() routine is called in the early init phase. Move them under arch_global_data. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* Revert "ast-g5: deactivate vbar (for qemu)"Cédric Le Goater2017-10-211-1/+1
| | | | | | | | | | | | | | | This reverts commit a0ca4ecbeae4ae9632ebc67bf5318dd2ea09c94f. Support was added to QEMU in : commit 91db4642f868 ("target-arm: Add VBAR support to ARM1176 CPUs") The work around happens to crash the guest when the vector relocation is done, with ignore_memory_transaction_failures=false which is now the default in QEMU. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* Add optional MTD and UBI support to ast-commonAdriana Kobylak2017-08-241-0/+12
| | | | | | | | | Add MTD and UBI support conditioned to having MTDPARTS_DEFAULT defined. This allows platforms to enable this support if desired without adding it by default since it increases the size of u-boot by about 70kB. Signed-off-by: Adriana Kobylak <anoo@linux.vnet.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* Add MTD support to Aspeed Flash driverAdriana Kobylak2017-08-241-0/+20
| | | | | | | | | | | | Add support to the aspeed flash driver to enable the common mtd layer through CONFIG_FLASH_CFI_MTD. This enables the flash to be used by u-boot mtd drivers including the mtdparts and ubi commands. Signed-off-by: Adriana Kobylak <anoo@linux.vnet.ibm.com> Acked-by: Milton Miller <miltonm@us.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* aspeed: Add WD2 reset support for ast-g5Mykola Kostenok2017-06-263-0/+13
| | | | | | | | | | Add support for WATCHDOG_RESET macro for aspeed g5 boards. With this change we can have the watchdog enabled from boot but also have u-boot pat the watchdog when dropping to the console. Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com> [joel: tweaked commit message, fixed defines] Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: Add defines for all watchdogsJoel Stanley2017-06-263-5/+8
| | | | | | | This adds defines for WDT2 (and WDT3 for the ast2500), and renames the existing one to WDT1. Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: Update platform_g5.S to version 16Joel Stanley2017-06-261-10/+250
| | | | | | | | | | 1.[P1] Add margin check/retry for DDR4 Vref training margin. 2.[P1] Add margin check/retry for DDR3/DDR4 read timing training margin. 3.[P2] Add initial sequence for LPC controller 4.[P2] Add initial full-chip reset option 5.[P3] Add 10ms delay after DDR reset Signed-off-by: Joel Stanley <joel@jms.id.au>
* Add extended configuration for ast-g5 boardMykola Kostenok2017-05-262-0/+36
| | | | | | | | | Add defconfig extends ast_g5_ncsi_defconfig with the number of options: It allows 2-nd boot partition, memory testing, boot, image info option, extra filesystem and environment commands. Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: Update platform_g5.S to version 15Joel Stanley2017-05-261-51/+266
| | | | | | This is the latest release from Aspeed. Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: use FIT-provided ramdisk if availableRick Altherr2017-01-171-1/+5
| | | | | | | | If the kernel FIT specifies a ramdisk, use it. Otherwise, expect a ramdisk at 0x20300000. Signed-off-by: Rick Altherr <raltherr@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: Use HUSH shellRick Altherr2017-01-164-0/+4
| | | | | | | | | HUSH is the newer command-line interface that provides scripting capabilities. Those are needed for an boot command that can boot either a FIT image that includes a ramdisk or a separate kernel and ramdisk. Signed-off-by: Rick Altherr <raltherr@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* Makefile: Fix linking with modern binutilsJoel Stanley2016-12-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set CONFIG_SYS_TEXT_BASE=0 with the following error: LD u-boot arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try linking with -N arm-linux-gnueabi-ld.bfd: final link failed: Bad value The issue can reproduced the bad binutils and the rock2_defconfig target. This issue was also encountered by the powerpc kernel[2], with the fix being to pass --no-dynamic-linker for linkers newer than 2.26 when this flag was introduced. The option tells ld that the PIE or shared lib does not need loaded program headers. Ubuntu Zesty's Binutils 2.27.51.20161202 hits this error. [1] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=1a9ccd70f9a7 [2] https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/commit/?h=next&id=ff45000fcb56b5b0f1a14a865d3541746d838a0a Signed-off-by: Joel Stanley <joel@jms.id.au>
* Enable FIT image support and FDT loading for AST2400/AST2500Rick Altherr2016-12-084-0/+20
| | | | | | | | | | | | | | | | | | | | | | FIT is the modern U-Boot native image format for kernels, device trees, and ramdisks. Enabling FIT only compiles in support for the image format. For these devices, the kernel+dtb and ramdisk are loaded from separate locations in flash and can be any mix of legacy or FIT images. When using FIT images, the dtb is stored as a separate entry that requires CONFIG_OF_LIBFDT to load it into RAM and pass it to the kernel. U-Boot enables EFI support by default but it only builds once FIT support is enabled. EFI support adds ~13k to the binary and is currently unused for any Aspeed platforms. Explicitly disable EFI support now that FIT support is enabled. Tested under qemu with both legacy and FIT kernel+dtb images for palmetto and witherspoon. Signed-off-by: Rick Altherr <raltherr@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* bootm: relocate ramdisk if CONFIG_SYS_BOOT_RAMDISK_HIGH setRick Altherr2016-12-083-16/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In 35fc84f, bootm was refactored so plain 'bootm' and 'bootm <subcommand>' shared a common implementation. The 'bootm ramdisk' command implementation is now part of the common implementation but not invoke by plain 'bootm' since the original implementation never did ramdisk relocation. Instead, ramdisk relocation happened in image_setup_linux() which is typically called during the OS portion of 'bootm'. On ARM, parameters to the Linux kernel can either be passed by FDT or ATAGS. When using FDT, image_setup_linux() is called which also triggers ramdisk relocation. When using ATAGS, image_setup_linux() is _not_ called because it mostly does FDT setup. Instead of calling image_setup_linux() in both FDT and ATAGS cases, include BOOTM_STATE_RAMDISK in the requested states during a plain 'bootm' if CONFIG_SYS_BOOT_RAMDISK_HIGH is set and remove the ramdisk relocation from image_setup_linux(). This causes ramdisk relocation to happen on any system where CONFIG_SYS_BOOT_RAMDISK_HIGH regardless of the OS being booted. Also remove IMAGE_ENABLE_RAMDISK_HIGH as it was only used by the now-removed code from image_setup_linux(). Signed-off-by: Rick Altherr <raltherr@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: remove hack loading ramdisk in memoryCédric Le Goater2016-12-081-11/+0
| | | | | | | Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Rick Altherr <raltherr@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* board/aspeed: Add ast-g5 boardJoel Stanley2016-07-278-0/+147
| | | | | | | This adds a Aspeed fifth generation board with defconfigs for a system with NCSI and with a directly attached PHY configuration. Signed-off-by: Joel Stanley <joel@jms.id.au>
* board/aspeed: Add ast-g4 boardJoel Stanley2016-07-279-0/+300
| | | | | | | This adds a Aspeed fourth generation board with defconfigs for a system with NCSI and with a directly attached PHY configuration. Signed-off-by: Joel Stanley <joel@jms.id.au>
* ast-g5: deactivate vbar (for qemu)Cédric Le Goater2016-07-271-1/+1
| | | | | | | | This is work around for the ast2500 qemu guest which does not handle the vbar yet. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* drivers/net: Add Aspeed nic driverJoel Stanley2016-07-274-0/+1590
| | | | | | | | | | | | | | | | | | | | | | | This is an alternate driver for the ftgmac100 hardware found in the Aspeed BMCs. It contains support for NC-SI that is lacking in the existing ftgmac100 driver. The code comes from the u-boot tree used by OpenBMC, which has origins in the Facebook OpenBMC project. In addition the following fixes were made: - Port new release - Clean up hw init - Remove scratch register writes - Fix RX buffer size - Make rx fifo poll for data (was: Fix unreliable networking) - Create aspeed_write_hwaddr from set_mac_address - Do not start hardware in initialize - Do not fill in a random MAC address - Start mac after ring buffers are initialized Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
* drivers/net/ftgmac100: Add Aspeed modificationsJoel Stanley2016-07-272-129/+422
| | | | | | | These are provided in the Aspeed BSP. The changes need to be refactored to be suitable for upstream. Signed-off-by: Joel Stanley <joel@jms.id.au>
* arm/arm1176: Aspeed start.S hackJoel Stanley2016-07-271-4/+4
| | | | | | This was included by Apseed in their SDK. Signed-off-by: Joel Stanley <joel@jms.id.au>
* aspeed: hacks made to common codeJoel Stanley2016-07-275-0/+43
| | | | | | | These are additions made by the Aspeed SDK outside of the arch directory. They need to be cleaned up and/or removed. Signed-off-by: Joel Stanley <joel@jms.id.au>
* ARM: AST2500: add supportJoel Stanley2016-07-2725-0/+8922
| | | | | | Extracted from ast_sdk.v00.03.21 which is based on u-boot v2013. Signed-off-by: Joel Stanley <joel@jms.id.au>
* Prepare v2016.07Tom Rini2016-07-111-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* doc: ARMv8: add README.pine64Andre Przywara2016-07-111-0/+98
| | | | | | | | | | | | Since we lack information about the DRAM initialization for the Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit involved at the moment. Add a README file to explain the process. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Move to board/sunxi/ from doc/] Signed-off-by: Tom Rini <trini@konsulko.com>
* mkimage -l is broken for images after gpimageStefano Babic2016-07-111-2/+2
| | | | | | | | | | | | Because a gpimage cannot be detected, a false GP header is printed instead of checking for further image types. Move gpimage as last to be linked, letting check all other image types and printing a GP header just in case no image is detected. Signed-off-by: Stefano Babic <sbabic@denx.de>
* git-mailrc: add rockchip aliasjk.kernel@gmail.com2016-07-111-1/+1
| | | | | | It's easier to Cc rockchip maintainers on rockchip-releated patches. Signed-off-by: jk <jk.kernel@gmail.com>
* armv8: Enable CPUECTLR.SMPEN for coherencyMingkai Hu2016-07-081-0/+8
| | | | | | | | | | | | | | | | For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is set. The SMPEN bit should be set before enabling the data cache. If not enabled, the cache is not coherent with other cores and data corruption could occur. For A57/A72, SMPEN bit enables the processor to receive instruction cache and TLB maintenance operations broadcast from other processors in the cluster. This bit should be set before enabling the caches and MMU, or performing any cache and TLB maintenance operations. Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* test/py: support 'memstart =' in u_boot_utils.find_ram_base()Daniel Schwierzeck2016-07-081-1/+1
| | | | | | | | | | Some archs like MIPS or PPC have a different 'bdinfo' output than ARM regarding the memory configuration. Also support 'memstart = 0x*' in u_boot_utils.find_ram_base() to make all tests requiring the RAM base working on those archs. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* test/py: strip VT100 codes from match bufferStephen Warren2016-07-081-0/+9
| | | | | | | | | | | | | | | | | | | | | Prior to this patch, any VT100 codes emitted by U-Boot are considered part of a command's output, which often causes tests to fail. For example, test_env_echo_exists executes printenv, and then considers any text on a line before an = sign as a valid U-Boot environment variable name. This includes any VT100 codes emitted. When the test later attempts to use that variable, the name would be invalid since it includes the VT100 codes. Solve this by stripping VT100 codes from the match buffer, so they are never seen by higher level test code. The codes are still logged unmodified, so that users can expect U-Boot's exact output without interference. This does clutter the log file a bit. However, it allows users to see exactly what U-Boot emitted rather than a modified version, which hopefully is better for debugging. It's also much simpler to implement, since logging happens as soon as text is received, and so stripping the VT100 codes from the log would require handling reception and stripping of partial VT100 codes. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* arm: Fix setjmp (again)Alexander Graf2016-07-081-1/+3
| | | | | | | | | | | | Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp code path with thumv1. Unfortunately it missed a constraint that the adr instruction can only refer to 4 byte aligned offsets. So this patch adds the required alignment hooks to make compilation work again even when setjmp doesn't happen to be 4 byte aligned. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Tom Rini <trini@konsulko.com>
* SPL: tiny-printf: avoid any BSS usageAndre Przywara2016-07-081-3/+8
| | | | | | | | | | As printf calls may be executed quite early, we should avoid using any BSS stored variables, since some boards put BSS in DRAM, which may not have been initialised yet. Explicitly mark those "static global" variables as belonging to the .data section, to keep tiny-printf clear of any BSS usage. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* test/py: fix CONFIG_ testsStephen Warren2016-07-082-5/+5
| | | | | | | | | | | Some CONFIG_ variables were recently renamed, but test/py wasn't updated to match. This causes some tests to be skipped. Fix test/py so the tests are run. Fixes: 11636258981a ("Rename reset to sysreset") Fixes: f1f9d4fac527 ("hush: complete renaming CONFIG_SYS_HUSH_PARSER to CONFIG_HUSH_PARSER") Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* mmc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()Mateusz Kulikowski2016-07-081-1/+6
| | | | | | | | | | | MMC core expects (now) valid mmc->dev pointer. During conversion in commit cffe5d86 not every driver was updated. This patch fixes crash while accessing MMC on boards using Qualcomm SDHCI controller. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-07-073-28/+21
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