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path: root/src/import/chips/p9
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* PM: Change in self sestore region for lab.Prem Shanker Jha2017-02-024-16/+90
* PM: Fixed offset for CME Instance rings in CPMR Header.Prem Shanker Jha2017-02-022-2/+6
* Disable special wakeup at the end of p9_pm_initCorey Swenson2017-02-024-38/+45
* Fix clearing CME_FLAGS to use EX target instead of EQ targetBrian Vanderpool2017-02-021-6/+9
* Change port sorting for memdiags subtest insertion to be in orderAndre Marin2017-02-011-5/+5
* Fix p9_mss_eff_grouping for 2 ports/groupThi Tran2017-02-011-14/+45
* IOPPE image build flowMartin Peschke2017-02-011-4/+10
* p9.fbc.ioe_tl.scom.initfile -- correct workaround for HW384245Joe McGill2017-02-011-7/+7
* p9_xip_customize -- remove customization of slave status and FBC IDsJoe McGill2017-02-011-3/+20
* Small fix to TOR API to NOT display dbg msg when passed a ringIdClaus Michael Olsen2017-01-301-1/+4
* Added periodic cal fix - fixes bad delaysStephen Glancy2017-01-309-2/+348
* workaround for hw400932 atag corruptin in prespShelton Leung2017-01-303-1/+49
* dd1 workaround for hw400075 coherency errorShelton Leung2017-01-303-1/+31
* Disable DQS polarity workaround.Andre Marin2017-01-301-0/+5
* VITAL cleaning for DD2Anusha Reddy Rangareddygari2017-01-301-19/+1
* p9.core.scan.initfile -- mask local error from CC in EC perv LFIRJoe McGill2017-01-301-0/+17
* p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulseJoe McGill2017-01-301-0/+17
* Updating P9 L2 scan initfile to use attributesLuke Murray2017-01-301-0/+34
* Add FORCE_FIFO_CAPTURE API and UTs. scominit cleanup.Andre Marin2017-01-303-6/+55
* TOR space reductionsMartin Peschke2017-01-3013-1104/+1380
* p9_tod_save_config L1 and L2CHRISTINA L. GRAVES2017-01-303-0/+201
* Remove action bit settings for HCA from p9_chiplet_scominit.Ben Gass2017-01-271-26/+0
* Adding in a comment to p9_tod_move_tod_to_tb to explain that 0x20 isCHRISTINA L. GRAVES2017-01-271-1/+2
* L3 work for volt and freq_systemsJacob Harvey2017-01-2511-175/+255
* Implement BC attributes and make eff_dimm classJacob Harvey2017-01-2512-5081/+5689
* FBC updates for HW383616, HW384245Joe McGill2017-01-245-21/+129
* Adding skip group dials for cache when chip=groupLuke Murray2017-01-241-0/+41
* Adding chip_ec_feature attributes for dd2 buildBen Gass2017-01-244-11/+1323
* added refresh monitoring inits, fixes refresh overrun issueShelton Leung2017-01-242-0/+12
* rdtag_dly formulas based on PHY delaysShelton Leung2017-01-242-121/+52
* PM: Suppressing TOR Traces by using debug level 0.Prem Shanker Jha2017-01-241-7/+7
* Fixed periodic cal bug causing data failsStephen Glancy2017-01-241-1/+3
* Adding dial to INT scom inits for HW395947Jenny Huynh2017-01-241-2/+9
* PM: Bug Fix pertaining to SCOM Restore Entry for NCU_DARN_RNG_BARPrem Shanker Jha2017-01-241-13/+21
* Add structure and read of MCBIST compare test resultsLouis Stermole2017-01-242-1/+322
* Change MCBIST 1R work around to actually check the pause bitsBrian Silver2017-01-241-2/+9
* p9_pm_pfet_init: redo log2 function to fix delay settingsGreg Still2017-01-241-90/+91
* Added Quad Power Management Mode Register Clear for Quad Power HwpRaja Das2017-01-231-1/+10
* Updating VPD XML descriptionsJacob Harvey2017-01-202-28/+46
* Modify eff_config to take a flag to only set SPD attributesAndre Marin2017-01-202-12/+29
* WOF Enablement in PGPERahul Batra2017-01-192-17/+40
* p9_pm_stop_gpe_init: added a checkAmit Kumar2017-01-192-2/+25
* Add RDIMM raw card reference B2 and unit testAndre Marin2017-01-192-3/+28
* add SS PLL settings to support 94 MHz PCI operationJoe McGill2017-01-191-0/+18
* Fix PM procedure problems found during hardware bringupCorey Swenson2017-01-192-8/+6
* configure FBC pump mode in SBEJoe McGill2017-01-1810-242/+69
* INT FIR updatesJoe McGill2017-01-181-9/+9
* MCD FIR updatesJoe McGill2017-01-181-3/+3
* CXA FIR updatesJoe McGill2017-01-171-7/+7
* VAS FIR updatesJoe McGill2017-01-171-7/+7
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