| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add bit field of master ranks attribute for PRD | Brian Silver | 2016-09-15 | 1 | -0/+14 |
| * | Change PHY to use GPO, RLO, WLO from VPD | Brian Silver | 2016-09-08 | 1 | -42/+0 |
| * | Modifying ATTRs for memory power thermal | Jacob Harvey | 2016-09-01 | 1 | -23/+55 |
| * | Implement MRW attributes; dram_clks, db_util, 2n_mode | Brian Silver | 2016-08-30 | 1 | -15/+0 |
| * | Fix eff_config, remove custom_dimm | Jacob Harvey | 2016-08-30 | 1 | -39/+2 |
| * | Fixed eff_config attr generation | Stephen Glancy | 2016-08-22 | 1 | -1/+1 |
| * | Adding defaults for DRAM dll_reset and dll_enable | Louis Stermole | 2016-08-22 | 1 | -1/+2 |
| * | Changes related to RTT VPD settings | Brian Silver | 2016-08-12 | 1 | -61/+1 |
| * | Add consumption of IBT from VPD and place in RCD7x | Brian Silver | 2016-08-12 | 1 | -19/+0 |
| * | Change ODT R/W to take values from VPD | Brian Silver | 2016-08-12 | 1 | -32/+0 |
| * | Update prologs of mirrored files to apache license | Stephen Cprek | 2016-08-05 | 1 | -8/+14 |
| * | Change MSS_VOLT to MSS_VOLT_VDDR | Jacob Harvey | 2016-08-02 | 1 | -5/+5 |
| * | Fix p9_mss_utils_to_throttle, create throttles API, attribute cleanup | Andre Marin | 2016-07-29 | 1 | -43/+16 |
| * | Modify SPD blob and eff-config hardcoding to match VBU | Andre Marin | 2016-07-13 | 1 | -56/+0 |
| * | Packaging of memory vpd on Nimbus, MCA->MCS | whs | 2016-06-24 | 1 | -112/+0 |
| * | Added initToZero tag for all memory attributes | Jacob Harvey | 2016-06-21 | 1 | -0/+225 |
| * | Add eff_config functionality needed for RIT, fix cas_latency bug & attr files | Andre Marin | 2016-05-19 | 1 | -393/+36 |
| * | Add override attributes for memory vpd access | Dan Crowell | 2016-05-12 | 1 | -0/+104 |
| * | Remove whitespace that breaks HB attribute compiler | Dan Crowell | 2016-05-06 | 1 | -1/+1 |
| * | Fix throttle procedure & MSS attribute clean up | Andre Marin | 2016-05-06 | 1 | -2940/+178 |
| * | Add L2 p9_mss_scrub | Brian Silver | 2016-05-06 | 1 | -348/+0 |
| * | Modify freq & dep. files. Add cas latency & unit tests | Andre Marin | 2016-05-06 | 1 | -5/+7 |
| * | Add dp16 io tx dll/vreg config | Brian Silver | 2016-05-06 | 1 | -0/+2 |
| * | Add mss throttle files L1 | Andre Marin | 2016-05-06 | 1 | -494/+77 |
| * | Change DIMM_SIZE from 8 bits to 32 bits | Brian Silver | 2016-05-06 | 1 | -10/+3 |
| * | Modify spd_decoder, eff_config, unit tests. Modify dependent files | Andre Marin | 2016-05-06 | 1 | -394/+18 |
| * | Add mcbist L2 function | Brian Silver | 2016-05-06 | 1 | -20/+29 |
| * | Add PHY RC class, update setup cal for 2D wc/rc | Brian Silver | 2016-05-06 | 1 | -4/+15 |
| * | Initial commit of memory subsystem | Brian Silver | 2016-05-06 | 1 | -0/+7288 |
