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authorBrian Silver <bsilver@us.ibm.com>2016-09-12 07:06:43 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2016-09-15 11:13:04 -0400
commitf8a9845a4811dc7e29e9461a5a6e0853dfeb32c3 (patch)
tree27bb3ed5a8178a2e0d537030426ed9e8bca63061 /src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
parentf79af2d77bdc37321d3de5e1c645b6f7b44ece61 (diff)
downloadtalos-hostboot-f8a9845a4811dc7e29e9461a5a6e0853dfeb32c3.tar.gz
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Add bit field of master ranks attribute for PRD
Change-Id: I2af0639ccc25952d6175c1c940a1d4a60af9843d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29480 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29482 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index f4f4362f3..b40d9f870 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -1162,6 +1162,20 @@
</attribute>
<attribute>
+ <id>ATTR_EFF_DIMM_RANKS_CONFIGED</id>
+ <targetType>TARGET_TYPE_MCS</targetType>
+ <description>
+ Bit wise representation of master ranks in each DIMM that are used for reads and writes.
+ Used by PRD.
+ </description>
+ <initToZero></initToZero>
+ <valueType>uint8</valueType>
+ <writeable/>
+ <array> 2 2</array>
+ <mssAccessorName>eff_dimm_ranks_configed</mssAccessorName>
+ </attribute>
+
+ <attribute>
<id>ATTR_EFF_NUM_PACKAGES_PER_RANK</id>
<targetType>TARGET_TYPE_MCS</targetType>
<description>Specifies the number of DRAM packages per rank.</description>
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