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author | Brian Silver <bsilver@us.ibm.com> | 2016-09-04 15:08:12 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-08 15:48:34 -0400 |
commit | 4837c147edef41e26a9b91339ca060f87c79ba76 (patch) | |
tree | 2257593a84a588609b1ced46b3a3d32ed379e0e3 /src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | |
parent | 5ac7cd3efa3337d9c32100d57d5adf4f8c623633 (diff) | |
download | talos-hostboot-4837c147edef41e26a9b91339ca060f87c79ba76.tar.gz talos-hostboot-4837c147edef41e26a9b91339ca060f87c79ba76.zip |
Change PHY to use GPO, RLO, WLO from VPD
Remove extra slew calibration files
Update VBU VPD
CMVC-Prereq: 1005024
Change-Id: I5681135761a19bf9223a1e63ed5a2d47d0944dc8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29227
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29228
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 4c714e317..f4f4362f3 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -2184,34 +2184,6 @@ </attribute> <attribute> - <id>ATTR_VPD_RLO</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A. - Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <array>2</array> - <mssAccessorName>vpd_rlo</mssAccessorName> - <writeable/> - </attribute> - - <attribute> - <id>ATTR_VPD_WLO</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A. - Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <array>2</array> - <mssAccessorName>vpd_wlo</mssAccessorName> - <writeable/> - </attribute> - - <attribute> <id>ATTR_EFF_DRAM_MODULE_BUS_WIDTH</id> <targetType>TARGET_TYPE_MCS</targetType> <description> @@ -2925,20 +2897,6 @@ </attribute> <attribute> - <id>ATTR_VPD_GPO</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM - associated with port A. Bytes 125 for port B, 189 for port C and 253 for port D - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <array>2</array> - <writeable/> - <mssAccessorName>vpd_gpo</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_EFF_DRAM_TDQS</id> <targetType>TARGET_TYPE_MCS</targetType> <description> |