| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Level 2 p9_cpu_special_wakeup | Greg Still | 2016-09-16 | 12 | -49/+1327 |
| * | Cleaned up memory_mrw_attributes.xml | Jacob Harvey | 2016-09-16 | 1 | -13/+68 |
| * | Fixed PHY impedance bugs and commments | Stephen Glancy | 2016-09-15 | 2 | -12/+12 |
| * | Explicitly declare FFDC shared_ptr for space savings | Dean Sanner | 2016-09-15 | 1 | -1/+1 |
| * | nest HWP updates for partial good MC, FBC chip_as_group | Joe McGill | 2016-09-15 | 3 | -31/+75 |
| * | Modifying INT initfile based on RAS reviews | Jenny Huynh | 2016-09-15 | 1 | -2/+2 |
| * | Merging single and multichip tod wrappers into one | CHRISTINA L. GRAVES | 2016-09-15 | 2 | -77/+203 |
| * | Fixed no DIMM configuration bug in xlate code | Stephen Glancy | 2016-09-15 | 1 | -1/+10 |
| * | Add bit field of master ranks attribute for PRD | Brian Silver | 2016-09-15 | 2 | -1/+106 |
| * | Change RCD, MRS polling delays; calculated no longer static | Brian Silver | 2016-09-14 | 2 | -0/+10 |
| * | Add SEQ timing parameters, DP16 RD Diag config 5 inits | Brian Silver | 2016-09-14 | 7 | -27/+128 |
| * | Level 2 HWP for p9_extract_sbe_rc | Soma BhanuTej | 2016-09-13 | 3 | -12/+504 |
| * | Fix dp16 workaround to return success if not ports were harmed | Brian Silver | 2016-09-13 | 1 | -0/+3 |
| * | Update memory library for 1R 4gbx4 DIMM | Brian Silver | 2016-09-13 | 5 | -171/+437 |
| * | Change SEQ timings, SEQ ODT, WC config and DQS polarity | Brian Silver | 2016-09-12 | 10 | -100/+661 |
| * | Add VPD decode and attributes for DQ and CKE maps | Brian Silver | 2016-09-12 | 6 | -3/+420 |
| * | P9 I/O Xbus Dccal/Linktrain Update | Chris Steffen | 2016-09-09 | 8 | -1413/+793 |
| * | Change DDR4 latency switch to always use MR0 A12 | Brian Silver | 2016-09-08 | 1 | -2/+3 |
| * | Change PHY to use GPO, RLO, WLO from VPD | Brian Silver | 2016-09-08 | 16 | -655/+475 |
| * | L1 and L2 for tod cleanup | CHRISTINA L. GRAVES | 2016-09-08 | 1 | -0/+9 |
| * | Adding A-buses for enum p9_tod_setup_bus for HWSV dependencies | CHRISTINA L. GRAVES | 2016-09-08 | 2 | -2/+30 |
| * | Tod init and tod setup changes for multi-chip | CHRISTINA L. GRAVES | 2016-09-08 | 2 | -11/+75 |
| * | p9_tod_save_config L1 and L2 | CHRISTINA L. GRAVES | 2016-09-08 | 1 | -1/+2 |
| * | Attribute Review - Nest | Thi Tran | 2016-09-08 | 1 | -2/+2 |
| * | Tod init and tod setup L2 procedures | CHRISTINA L. GRAVES | 2016-09-08 | 4 | -47/+1376 |
| * | Adding the L1s for p9_tod_init and p9_tod_setup | CHRISTINA L. GRAVES | 2016-09-08 | 6 | -0/+446 |
| * | xip_customize: More removal of trace output noise for Cronus. | Claus Michael Olsen | 2016-09-08 | 1 | -4/+9 |
| * | Migrate dimm module decoder from rdimm to common dir | Andre Marin | 2016-09-06 | 3 | -577/+593 |
| * | Add empty files for PHY SEQ, workarounds for mirroring | Brian Silver | 2016-09-06 | 4 | -0/+96 |
| * | Add phy_cntrl.C empty for mirroring | Brian Silver | 2016-09-06 | 1 | -0/+24 |
| * | PLL configuration updates -- permit e2e bypass execution | Joe McGill | 2016-09-04 | 2 | -63/+125 |
| * | Remove explicit calls to p9_cpu_special_wakeup from HWPs | Dan Crowell | 2016-09-04 | 2 | -48/+5 |
| * | Tod init and tod setup changes for multi-chip | CHRISTINA L. GRAVES | 2016-09-04 | 1 | -21/+12 |
| * | Tod init and tod setup L2 procedures | CHRISTINA L. GRAVES | 2016-09-04 | 5 | -25/+539 |
| * | Changes related to PHY register review | Brian Silver | 2016-09-03 | 9 | -568/+278 |
| * | Add SPD decoder fall back options for unsupported revisions | Andre Marin | 2016-09-02 | 1 | -8/+11 |
| * | updated init vals | Emmanuel Sacristan | 2016-09-02 | 1 | -8/+8 |
| * | Adding the L1s for p9_tod_init and p9_tod_setup | CHRISTINA L. GRAVES | 2016-09-02 | 3 | -0/+175 |
| * | Mvpd accessor and xip_customize: Quieting down trace noise from RING_NOT_FOUND | Claus Michael Olsen | 2016-09-02 | 2 | -11/+27 |
| * | Add empty base and lrdimm decoder file for HB CI mirroring | Andre Marin | 2016-09-02 | 5 | -0/+170 |
| * | Increase timeout in p9_pm_stop_gpe_init.C | Marty Gloff | 2016-09-02 | 1 | -1/+1 |
| * | Change VPD for power on and VBU | Grover Monster | 2016-09-02 | 6 | -251/+579 |
| * | Add ZQCL instruction after MRS have completed | Brian Silver | 2016-09-02 | 1 | -2/+42 |
| * | Create MRS data structures | Brian Silver | 2016-09-02 | 1 | -49/+9 |
| * | Modifying ATTRs for memory power thermal | Jacob Harvey | 2016-09-01 | 2 | -119/+310 |
| * | Add RCD infrastructure, remove RCD hardcodes from eff_config | Andre Marin | 2016-09-01 | 13 | -535/+921 |
| * | Avoid nullptr in vpd decode for ports with no DIMM | Brian Silver | 2016-08-31 | 1 | -9/+3 |
| * | Implement MRW attributes; dram_clks, db_util, 2n_mode | Brian Silver | 2016-08-30 | 3 | -186/+11 |
| * | Fix eff_config, remove custom_dimm | Jacob Harvey | 2016-08-30 | 16 | -568/+466 |
| * | p9_xip_customize: Add #G and #R rings to the seeprom image from VPD | Prachi Gupta | 2016-08-30 | 3 | -122/+954 |
