Tod init and tod setup changes for multi-chip

Change-Id: I1a94993115e46c65b2a46bedcfea4cd378d0e915
Original-Change-Id: I52a0b0955434892e4dd96b9ea8ffbb82c966bdb2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25272
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29259
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 75 insertions, 11 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
index 05ef938c0..dccd7a6d7 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
@@ -332,6 +332,10 @@ extern "C"
                                  PERV_TOD_S_PATH_CTRL_REG_0_STEP_CHECK_VALIDITY_COUNT_LEN>(STEP_CHECK_VALIDITY_COUNT_8);
         }
 
+        //In either case set the S_PATH_REMOTE_SYNC_MISS_COUNT_MAX to 1
+        data.insertFromRight<PERV_TOD_S_PATH_CTRL_REG_REMOTE_SYNC_MISS_COUNT_MAX, PERV_TOD_S_PATH_CTRL_REG_REMOTE_SYNC_MISS_COUNT_MAX_LEN>
+        (S_PATH_REMOTE_SYNC_MISS_COUNT_1);
+
         FAPI_TRY(fapi2::putScom(*target, PERV_TOD_S_PATH_CTRL_REG, data),
                  "fapiPutScom error for PERV_TOD_S_PATH_CTRL_REG SCOM.");
 
@@ -827,35 +831,69 @@ extern "C"
         else // slave node
         {
             uint32_t bus_mode_addr = 0;
-            //uint32_t bus_mode_sel = 0;
+            uint32_t bus_mode_sel = 0;
             uint32_t bus_freq = 0;
-            uint8_t  bus_delay = 0;
+            uint32_t  bus_delay = 0;
+
+            data.flush<0>();
 
             switch (i_tod_node->i_bus_rx)
             {
                 case(XBUS0):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X0_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_0>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_0123_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR0_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS1):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X1_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_1>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_0123_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR1_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS2):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X2_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_2>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_0123_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR2_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS3):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X3_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_3>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_0123_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR3_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS4):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X4_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_4>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_45_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR4_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS5):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X5_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_5>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_45_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR5_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS6):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X6_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_5>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_45_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR5_LINK_DELAY_START_BIT;
+                    break;
 
                 case(XBUS7):
-                    bus_freq = i_freq_x; /*bus_mode_addr = PB_X_MODE_0x04010C0A; bus_mode_sel = PB_X_MODE_LINK_X7_ROUND_TRIP_DELAY;*/ break;
+                    bus_freq = i_freq_x;
+                    data.setBit<PB_ELINK_RT_DELAY_CTL_SET_LINK_5>();
+                    bus_mode_addr = PU_PB_ELINK_DLY_45_REG;
+                    bus_mode_sel = PB_ELINK_DLY_FMR5_LINK_DELAY_START_BIT;
+                    break;
 
                 case(NONE):
                     FAPI_ASSERT((i_tod_node->i_bus_rx != NONE),
@@ -863,9 +901,15 @@ extern "C"
                     break;
             }
 
+            FAPI_TRY(fapi2::putScom(*target, PU_PB_ELINK_RT_DELAY_CTL_REG, data),
+                     "Error setting the Electrical Link Control register!");
+
             FAPI_TRY(fapi2::getScom(*target, bus_mode_addr, data),
                      "Error from fapiGetScom when retrieving bus_mode_addr!");
-            //TODO Figure out where LINK_ROUND_TRIP_DELAY_LEN is coming from data.extract(&bus_delay, bus_mode_sel, LINK_ROUND_TRIP_DELAY_LEN);
+            FAPI_TRY(data.extractToRight(bus_delay, bus_mode_sel, PB_ELINK_DLY_FMR_LINK_DELAY_LEN),
+                     "Error trying to extract delay");
+
+            //FAPI_ASSERT(!data.getBit<bus_mode_sel>(), fapi2::P9_TOD_LINK_DELAY_NOT_VALID.set_TARGET(target).set_ADDR(bus_mode_addr).set_DATA(data), "the TOD delay first bit is set to 1 so it is not valid");
 
             // By default, the TOD grid runs at 400ps; TOD counts its delay based on this
             // Example: Bus round trip delay is 35 cycles and the bus is running at 4800MHz
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H
index da63826ae..3836db5c8 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H
@@ -228,6 +228,26 @@ const uint32_t TFMR_STATE_TB_RUNNING = 8;
 const uint32_t TFMR_LOAD_TOD_MOD_TB = 16;
 const uint32_t TFMR_MOVE_CHIP_TOD_TO_TB = 18;
 
+//PB_ELINK_DLY register bits
+const uint32_t PB_ELINK_DLY_FMR0_LINK_DELAY_START_BIT = 4;
+const uint32_t PB_ELINK_DLY_FMR1_LINK_DELAY_START_BIT = 20;
+const uint32_t PB_ELINK_DLY_FMR2_LINK_DELAY_START_BIT = 36;
+const uint32_t PB_ELINK_DLY_FMR3_LINK_DELAY_START_BIT = 52;
+const uint32_t PB_ELINK_DLY_FMR4_LINK_DELAY_START_BIT = 4;
+const uint32_t PB_ELINK_DLY_FMR5_LINK_DELAY_START_BIT = 20;
+const uint32_t PB_ELINK_DLY_FMR_LINK_DELAY_LEN = 12;
+
+//PB_ELINK_RT_DELAY register bits
+const uint32_t PB_ELINK_RT_DELAY_CTL_SET_LINK_0 = 0;
+const uint32_t PB_ELINK_RT_DELAY_CTL_SET_LINK_1 = 1;
+const uint32_t PB_ELINK_RT_DELAY_CTL_SET_LINK_2 = 2;
+const uint32_t PB_ELINK_RT_DELAY_CTL_SET_LINK_3 = 3;
+const uint32_t PB_ELINK_RT_DELAY_CTL_SET_LINK_4 = 4;
+const uint32_t PB_ELINK_RT_DELAY_CTL_SET_LINK_5 = 5;
+
+//The number of syncs that we are ok with the slave path missing (this must be set to at least 1 or there will be a fail)
+const uint32_t S_PATH_REMOTE_SYNC_MISS_COUNT_1 = 1;
+
 //I don't see this one listed in the P9 documentation
 const uint32_t TOD_CHIP_CTRL_REG_LOW_ORDER_STEP_VAL_3F  = 0x3F;