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| author | CHRISTINA L. GRAVES <clgraves@us.ibm.com> | 2016-06-30 11:01:54 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-08 15:43:13 -0400 |
| commit | 55231835d05aa836d95de8bbdd35eeabb4bde194 (patch) | |
| tree | 76c84e7094909bb3679b6dad05e018f1ecf28907 /src/import/chips/p9/procedures/hwp | |
| parent | 5682673190701063cb33133e632d2966d6ae193d (diff) | |
| download | talos-hostboot-55231835d05aa836d95de8bbdd35eeabb4bde194.tar.gz talos-hostboot-55231835d05aa836d95de8bbdd35eeabb4bde194.zip | |
Adding A-buses for enum p9_tod_setup_bus for HWSV dependencies
Change-Id: Ib49746483f78d243ed8feeddb1189f0da89fae21
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26497
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29260
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C | 23 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H | 9 |
2 files changed, 30 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C index dccd7a6d7..14fb0076d 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C @@ -420,6 +420,13 @@ extern "C" port_rx_select_val = TOD_PORT_CTRL_REG_RX_X7_SEL; break; + case(ABUS0): + case(ABUS1): + case(ABUS2): + FAPI_ASSERT((i_tod_node->i_bus_rx != ABUS0 && i_tod_node->i_bus_rx != ABUS1 && i_tod_node->i_bus_rx != ABUS2), + fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY().set_TARGET(target).set_OSCSEL(i_osc_sel), "i_tod_node->i_bus_rx is set to ABUS"); + break; + case(NONE): break; //MDMT has no rx } @@ -544,9 +551,16 @@ extern "C" data2.setBit<TOD_PORT_CTRL_REG_TX_X7_EN>(); break; + case(ABUS0): + case(ABUS1): + case(ABUS2): + FAPI_ASSERT((tod_node->i_bus_tx != ABUS0 && tod_node->i_bus_tx != ABUS1 && tod_node->i_bus_tx != ABUS2), + fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY().set_TARGET(target).set_OSCSEL(i_osc_sel), "i_tod_node->i_bus_tx is set to ABUS"); + break; + case(NONE): FAPI_ASSERT((tod_node->i_bus_tx != NONE), - fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY().set_TARGET(target).set_OSCSEL(i_osc_sel), "i_tod_node->i_bus_rx is set to NONE"); + fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY().set_TARGET(target).set_OSCSEL(i_osc_sel), "i_tod_node->i_bus_tx is set to NONE"); break; } } @@ -895,6 +909,13 @@ extern "C" bus_mode_sel = PB_ELINK_DLY_FMR5_LINK_DELAY_START_BIT; break; + case(ABUS0): + case(ABUS1): + case(ABUS2): + FAPI_ASSERT((i_tod_node->i_bus_rx != ABUS0 && i_tod_node->i_bus_rx != ABUS1 && i_tod_node->i_bus_rx != ABUS2), + fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY().set_TARGET(target).set_OSCSEL(i_freq_x), "i_tod_node->i_bus_rx is set to ABUS"); + break; + case(NONE): FAPI_ASSERT((i_tod_node->i_bus_rx != NONE), fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY().set_TARGET(target).set_OSCSEL(i_freq_x), "i_tod_node->i_bus_rx is set to NONE"); diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H index 3836db5c8..cfee1f447 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_utils.H @@ -272,7 +272,14 @@ extern "C" { XBUS4, XBUS5, XBUS6, - XBUS7 + XBUS7, + //TODO These were added for Manish and the HWSV code since it has dependency on these enums. + //Manish is waiting until the specifications of multi-node systems are there and then + //he will modify his code and I will remove these. The ABUSes are not for FAPI consumption. + ABUS0, + ABUS1, + ABUS2, + BUS_MAX = ABUS2 }; enum tod_action |
