summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/memory
Commit message (Expand)AuthorAgeFilesLines
* Change port sorting for memdiags subtest insertion to be in orderAndre Marin2017-02-011-5/+5
* Added periodic cal fix - fixes bad delaysStephen Glancy2017-01-306-2/+315
* Disable DQS polarity workaround.Andre Marin2017-01-301-0/+5
* Add FORCE_FIFO_CAPTURE API and UTs. scominit cleanup.Andre Marin2017-01-303-6/+55
* L3 work for volt and freq_systemsJacob Harvey2017-01-257-52/+61
* Implement BC attributes and make eff_dimm classJacob Harvey2017-01-259-5078/+5591
* FBC updates for HW383616, HW384245Joe McGill2017-01-241-3/+3
* Fixed periodic cal bug causing data failsStephen Glancy2017-01-241-1/+3
* Add structure and read of MCBIST compare test resultsLouis Stermole2017-01-242-1/+322
* Change MCBIST 1R work around to actually check the pause bitsBrian Silver2017-01-241-2/+9
* Updating VPD XML descriptionsJacob Harvey2017-01-201-24/+39
* Modify eff_config to take a flag to only set SPD attributesAndre Marin2017-01-202-12/+29
* Add RDIMM raw card reference B2 and unit testAndre Marin2017-01-192-3/+28
* p9_mss_attr_update -- support CRP Lx keyword v2Joe McGill2017-01-171-3/+5
* Move SEQ ODT Write Configuration from draminit_training to scominitAndre Marin2017-01-162-9/+7
* Add in empty eff_dimm files for mirroring purposesJacob Harvey2017-01-132-0/+48
* Change mss::pos for DIMM to leverage FAPI_POSBrian Silver2017-01-131-31/+30
* Change adr.H to include FET slice constants from new engdBrian Silver2017-01-131-14/+8
* Remove static keyword from polling vectors due to thread error.Andre Marin2017-01-125-12/+14
* Fix fapi2::current_err bug in checker.HJacob Harvey2017-01-125-103/+101
* Add rdtag change delay API and unit tests.Andre Marin2017-01-121-27/+68
* Add state machine for mrep and dwl training and unit testsAndre Marin2017-01-064-1/+465
* Reflow ddr phy FIR checking/unmasking to not unmask if FIR are setBrian Silver2017-01-051-1/+17
* Add more polling loops to mss_scrubBrian Silver2017-01-041-1/+1
* Default Enable Address hash in ECCShelton Leung2017-01-041-1/+3
* Change sf_read to run multiple ports to end of MCBIST rangeBrian Silver2017-01-045-55/+210
* Change MCBIST error message to reflect bits checkedBrian Silver2017-01-041-1/+1
* Fixed WR VREF settings bugStephen Glancy2017-01-044-44/+46
* Add missing raw card reference (C2) for RDIMMs and UTsAndre Marin2017-01-042-0/+28
* Add MSS customization support from CRP0 Lx MVPDJoe McGill2017-01-0412-138/+720
* Add BCW API for rank presence, buffer training, mrep timing and UTs.Andre Marin2017-01-034-66/+490
* Move MRS attributes to eff_config to calc LRDIMMsJacob Harvey2017-01-0312-150/+771
* Add read cmd, precharge all cmd, and read cmd CCS instruction and unit testsAndre Marin2017-01-034-72/+383
* Updating shmoo to use per-lane failsStephen Glancy2016-12-211-0/+8
* Improve detection and description for MEMVPD_POS issuesDan Crowell2016-12-201-4/+5
* Add minor minor version feature support to getecidBrian Silver2016-12-191-10/+21
* Change R17/R16 bits for 1R DIMM config depending on slot configsBrian Silver2016-12-161-4/+4
* Add settings for DDR 2N modeBrian Silver2016-12-145-21/+55
* Add Memory Subsystem FIR supportBrian Silver2016-12-0818-81/+1088
* Add rank config MRW override to plug rulesBrian Silver2016-12-084-27/+220
* Add EC workaround for PHY training bad bit processingBrian Silver2016-12-072-1/+31
* Add common functionality between RCD and data buffer control word APIAndre Marin2016-12-076-304/+400
* Adds WR VREF error loggingStephen Glancy2016-12-073-24/+120
* Add a common MRS engine to set up CCS instructions and UTs.Andre Marin2016-12-065-222/+390
* Add DDR4 data buffer control words (BCWs) infrastructure & UT's.Andre Marin2016-12-069-18/+814
* Fixing bulk_pwr_throttles calculationsJacob Harvey2016-12-0510-96/+411
* Add to the scom blastah unit testsBrian Silver2016-12-051-0/+3
* Memory lab tool updates for mss_check_bandwidth and mss_power_controlsMichael Pardeik2016-12-051-1/+1
* Added error count mode 2 to MCBIST labStephen Glancy2016-11-152-0/+17
* Add LRDIMM to translation register infrastructure and unit tests.Andre Marin2016-11-143-721/+1388
OpenPOWER on IntegriCloud