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path: root/src/import/chips/p9/procedures/hwp
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* Fix for missing symbolKahn Evans2017-02-021-1/+2
* PM: Change in self sestore region for lab.Prem Shanker Jha2017-02-022-9/+82
* PM: Fixed offset for CME Instance rings in CPMR Header.Prem Shanker Jha2017-02-022-2/+6
* Disable special wakeup at the end of p9_pm_initCorey Swenson2017-02-024-38/+45
* Fix clearing CME_FLAGS to use EX target instead of EQ targetBrian Vanderpool2017-02-021-6/+9
* Change port sorting for memdiags subtest insertion to be in orderAndre Marin2017-02-011-5/+5
* Fix p9_mss_eff_grouping for 2 ports/groupThi Tran2017-02-011-14/+45
* p9.fbc.ioe_tl.scom.initfile -- correct workaround for HW384245Joe McGill2017-02-011-7/+7
* p9_xip_customize -- remove customization of slave status and FBC IDsJoe McGill2017-02-011-3/+20
* Added periodic cal fix - fixes bad delaysStephen Glancy2017-01-307-2/+316
* workaround for hw400932 atag corruptin in prespShelton Leung2017-01-301-1/+14
* dd1 workaround for hw400075 coherency errorShelton Leung2017-01-301-1/+8
* Disable DQS polarity workaround.Andre Marin2017-01-301-0/+5
* Add FORCE_FIFO_CAPTURE API and UTs. scominit cleanup.Andre Marin2017-01-303-6/+55
* TOR space reductionsMartin Peschke2017-01-306-232/+428
* p9_tod_save_config L1 and L2CHRISTINA L. GRAVES2017-01-303-0/+201
* Remove action bit settings for HCA from p9_chiplet_scominit.Ben Gass2017-01-271-26/+0
* Adding in a comment to p9_tod_move_tod_to_tb to explain that 0x20 isCHRISTINA L. GRAVES2017-01-271-1/+2
* L3 work for volt and freq_systemsJacob Harvey2017-01-257-52/+61
* Implement BC attributes and make eff_dimm classJacob Harvey2017-01-259-5078/+5591
* FBC updates for HW383616, HW384245Joe McGill2017-01-243-19/+93
* added refresh monitoring inits, fixes refresh overrun issueShelton Leung2017-01-241-0/+2
* rdtag_dly formulas based on PHY delaysShelton Leung2017-01-241-99/+35
* PM: Suppressing TOR Traces by using debug level 0.Prem Shanker Jha2017-01-241-7/+7
* Fixed periodic cal bug causing data failsStephen Glancy2017-01-241-1/+3
* Adding dial to INT scom inits for HW395947Jenny Huynh2017-01-241-2/+9
* PM: Bug Fix pertaining to SCOM Restore Entry for NCU_DARN_RNG_BARPrem Shanker Jha2017-01-241-13/+21
* Add structure and read of MCBIST compare test resultsLouis Stermole2017-01-242-1/+322
* Change MCBIST 1R work around to actually check the pause bitsBrian Silver2017-01-241-2/+9
* p9_pm_pfet_init: redo log2 function to fix delay settingsGreg Still2017-01-241-90/+91
* Added Quad Power Management Mode Register Clear for Quad Power HwpRaja Das2017-01-231-1/+10
* Updating VPD XML descriptionsJacob Harvey2017-01-201-24/+39
* Modify eff_config to take a flag to only set SPD attributesAndre Marin2017-01-202-12/+29
* WOF Enablement in PGPERahul Batra2017-01-191-3/+21
* p9_pm_stop_gpe_init: added a checkAmit Kumar2017-01-191-1/+13
* Add RDIMM raw card reference B2 and unit testAndre Marin2017-01-192-3/+28
* Fix PM procedure problems found during hardware bringupCorey Swenson2017-01-192-8/+6
* configure FBC pump mode in SBEJoe McGill2017-01-189-237/+65
* INT FIR updatesJoe McGill2017-01-181-9/+9
* MCD FIR updatesJoe McGill2017-01-181-3/+3
* CXA FIR updatesJoe McGill2017-01-171-7/+7
* VAS FIR updatesJoe McGill2017-01-171-7/+7
* NX FIR updatesJoe McGill2017-01-171-12/+12
* PCI FIR initialization updatesJoe McGill2017-01-172-77/+91
* p9_mss_attr_update -- support CRP Lx keyword v2Joe McGill2017-01-171-3/+5
* Set the quad stop state on non master chipsDean Sanner2017-01-171-1/+17
* FIR updates -- pervasive/core/PPEJoe McGill2017-01-161-46/+46
* PSI FIR updatesJoe McGill2017-01-161-5/+5
* p9_chiplet_scominit -- set FBC IOE/IOO DL TL FIR programming, mask HCA FIRsJoe McGill2017-01-164-38/+97
* NPU FIR updatesJoe McGill2017-01-161-9/+8
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