| Commit message (Collapse) | Author | Age | Files | Lines |
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Changes to clean unwanted symbols
Changes to support only unrecoverable error (1) in HCode error logs
Changes to remove reserved member, such that errlog_idx match the spec.
Change-Id: I2b56905e5ea2f7d3b4c879be9b4563d9ccbb983b
RTC: 207368
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80598
Reviewed-by: Christopher J Cain <cjcain@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S Still <stillgs@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80661
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Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R Geddes <crgeddes@us.ibm.com>
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Change-Id: I5818fcc3f78f55d7c60281cb6f3e814eab05646b
RTC: 208523
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79822
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Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
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Reviewed-by: Benjamen G. Tyner <ben.tyner@ibm.com>
Reviewed-by: Paul Greenwood <paul.greenwood@ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79878
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ignore NPU chip unit translation requests in fircheck code, xlate
code does not support arbitrary instance as input which is specified
by XML
fix SCOM xlate code to match on PPE instance 2,5
Change-Id: Iaf0a3352386515e2b1cac83d9853d01780be28d4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79769
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Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
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2nd commit in the series of 2 commits for
WOV(OverCurrent Sampling, OCS)
Commit 1: WOV(OCS) HW procedures updates
Commit 2: WOV(OCS) PGPE Hcode updates
Key_Cronus_Test=PM_REGRESS
HW-Image-Prereq: I6234f0f60b9ed57b8b144159f3fe9c0b756df1e3
Change-Id: I64d72c8c2c3163d000a640959e0b188ab63d3819
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70514
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Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78939
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: I8e4d883ea578c03b468e113e66bd834adf52ba5c
RTC: 208523
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77575
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Reviewed-by: Benjamen G. Tyner <ben.tyner@ibm.com>
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Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77638
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There is an intrinsic link between ATTR_FREQ_MCA_MHZ and
ATTR_FREQ_OMI_MHZ and ATTR_MC_PLL_BUCKET.
-ATTR_MC_PLL_BUCKET will be read-only, platforms will return the
value based on ATTR_FREQ_OMI_MHZ.
-ATTR_FREQ_MCA_MHZ will be read-only (again), platforms will return
the value based on ATTR_FREQ_OMI_MHZ.
-ATTR_FREQ_OMI_MHZ will be writeable, defaulted by mrw/config file,
written by mss_freq_system.
-OMI_PLL_FREQ_LIST was be expanded to include the value of
ATTR_FREQ_MCA_MHZ. Platforms will use ATTR_FREQ_OMI_MHZ (and VCO)
as the key into OMI_PLL_FREQ_LIST to determine the value of
ATTR_MC_PLL_BUCKET and ATTR_FREQ_MCA_MHZ
Change-Id: I17681b8b1ff8ad6b195fc741e20e48ac60ce1c99
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76877
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Frequencies supported for OMI:
OMI VCO Data rate MCA_FREQ
19200, 0, DDR4-2400 1200
21330, 0, DDR4-2667 1333
23460, 0, DDR4-2933 1466
23460, 1, DDR4-2933 1466
25600, 1, DDR4-3200 1600
Change-Id: Ideebc4636f79302f3728264fb8dc63a3ba4e807a
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/54198
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Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
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Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/54203
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Add p9a_omi_setup_bars procedure
Add eclipse project files to .gitignore
Change-Id: Ia18cd213ac8b3682e5718b3c631dad631b97170f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67755
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: I8d6afd28e96ed987333471a3f0317b4ff06a8671
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72201
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Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72210
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Iafa88363b862e9175982836f1686199e9366d555
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69721
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Change-Id: Ib6dcbb293b4fd71b152b3ab758a0ff655ed28c94
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70435
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Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
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Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71344
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Key_Cronus_Test=PM_REGRESS
Change-Id: Ieabbc383d2bbbd1df8cf5a2ed5b503c860518cd8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70412
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Key_Cronus_Test=PM_REGRESS
Change-Id: I82e0953c766857b447d67e89aba3d987eb38d88b
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70643
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Change-Id: Ibb95cdb497401ce16f9d39d37e93a8e5618f0ffc
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70955
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Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
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This reverts commit 5967161b503f55c81ae566bd5f8f663de2a06683.
Change-Id: Ibb267c025cd8d3cd5c7b05c15933092a5d84d364
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69896
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
Change-Id: If35969fc72e1ffedf9916fcaa78617ff635e812a
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69542
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Change-Id: I3680ec9a15e3e82f6cbb6e3a485ecf49e5b77ac1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67955
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Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Change-Id: If152838e04b317ffcaa34e795efbd814741b5daa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58447
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
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P9a_clockcntl.C fix bug for MC units
Change-Id: Iacbc43e6d42595b7d56a8ce462575622f2f12807
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64414
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Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64423
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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- p9c DD1.1+ only, DD1.0 not supported
- FW to trigger reconfig loop back to step 0 from
sys_proc_fab_iovalid if:
1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS
-- AND --
2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc
objects identifying links which failed on this chip) has entries
- attribute changes:
ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even
and odd), and reconfig loop will adjust value as we go
CMVC-Prereq:1057645
Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022
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Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59039
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-> p9_sim_model_boot.C
-> p9_frequency_bucket.H
-> cronus_auto_settings.H
Change-Id: Ic3b099c7e43d673d861c83f33caede27f9b5d10e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58402
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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P9A will not support NV targets.
They were replaced by OBUS_BRICK targets and are
not used.
Change-Id: I1452b7dd3655665237fc2a7c59e5d6c227dc9123
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55358
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55370
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
Change-Id: I00aca629108aeaca88db34eec8e408f3cd48ff7f
CQ: SW414842
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48635
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I06f679f555c5dfd0a66f5b9bc5ff1e3424c4aae7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55383
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Also initial mk files for p9n 2.3, but p9c 1.2 will be first.
Change-Id: Ia73aba37be5bcf64b1b2cfe5b1ed153b189c7777
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53909
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Key_Cronus_Test=PM_REGRESS
Change-Id: I009bb7307468139529e8325eb8ad86c1706a6117
CQ:SW417260
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53919
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A summary of STOP recovery FFDC is created after generation of
complete FFDC. It is stored at the end of FFDC section. It is
intended for copying to an error log created during second
phase of STOP Recovery. Commit also incorporates some changes
to support creation of PM Display from STOP Recovery FFDC.
Key_Cronus_Test=PM_REGRESS
CQ: SW416531
Change-Id: Ieb0bceeb141cc80b18f63b01e881e5ad3b50263d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50414
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Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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p9n dd22 -> swap bucket1, bucket3 content
bucket1 will now produce 25.78125
bucket3 will now produce 25.00000
p9c dd11 -> replace bucket3 content
bucket3 will now produce 25.625
initfile changes are comment only -- no change in EMTS
Change-Id: Ie49b9b4af81358ee8fa831ffe8fd2c33650dcc50
CQ: HW433692
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Upon PGPE Halt
1) SGPE performs STOP Recovery Trigger to set
a malfunction alert and removes PGPE IPCs
from wake-up decisions.
2) CME is interrupted by QPPM OCC Heartbeat
Lost that PGPE stopped updating
Upon SGPE Halt
1) PGPE moves to Psafe
2) PGPE performs STOP Recovery Trigger to set
a malfunction alert.
This commit also includes SGPE Panic Code
Cleanup such as debug halt support.
However PGPE Panic Code Cleanup is dealt in
a different commit
Key_Cronus_Test=PM_REGRESS
Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4
CQ: SW410252
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275
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Commit adds error injection capability in the hcode of CME,
SGPE and PGPE.
- CME reads CSAR[30|31] and if asserted traps
- SGPE reads OCC Flag2[30] and if asserted traps
- PGPE reads OCC Flag2[31] and if asserted traps
Change-Id: Ia8476076ce4953ced4eda30927bd891481b0373c
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Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
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Correct nestn1 domain masks for partial good obuses
Change-Id: I57efeff590a2b0a4830b19fbfff2eea09e16db2b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49909
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Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Change-Id: If9ffe53acd009c1520cdd7f162e88fd235799225
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46361
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Change-Id: I930e067f97ee40f4d07e260b08076fdc323da851
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45078
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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p9.filter.pll.scan.initfile
adjust BG offset to -1 for P9n DD2.[12], P9c DD1.1
apply BW updates to P9n DD2.2, P9c DD1.[01]
p9.obus.pll.scan.initfile
apply BW updates to P9n DD2.2, P9c DD1.[01]
with tests 108, 109, 110
p9_frequency_buckets:
default Cumulus OBUS bucket 0 to 25.625gbs
chip_ec_attributes.xml
add feature attributes for BG, BW controls
Change-Id: I5e06da5267db70bb1d6e6eae066611577d32ac7b
CQ: HW423532
CQ: HW423535
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48267
Reviewed-by: Ann C. Wu <annchen@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
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Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48270
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: I451695b8ae1d8f7d5ed6d512631992dea98b5ee8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46967
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46970
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ie77fa74ff6ea282635b9be8e09cdd95fb62ae75e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46378
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46380
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Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Update dmi_dccal to use MC target for busctl registers.
Change-Id: I1f1ffb4bf23a3f634e5712f410d37413d2843771
Original-Change-Id: I2da493a558ade5824065f23821dfbb980e564eea
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44670
Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
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Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com>
Reviewed-by: John G. Rell III <jgrell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45794
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Change-Id: I3fece1e530fa9119ef8174529379019fa4a43ed8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45014
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45017
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Change-Id: Iccfab131b8704666b2a45c20d6326f2007acced9
RTC:173229
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41634
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45172
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I7ccf60233d8aa9c79afe33155a86125f68adb50c
Original-Change-Id: I9830aff8e0f33d5643d765ed2ef091d2ca8a610e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29359
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45171
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: If7d75e5da2b4099fb03bc7b3fd73654645708842
Original-Change-Id: I08440fadfeff7e4777a776167d4fdcffe5fec82f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21058
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45170
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Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Id31daf8c02b74d979927540346a3cef5f88768be
RTC: 175615
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34935
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Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34940
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I551322dcaaf57cdcb76371eef4da4f5976501725
CQ: HW416892
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43424
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43427
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adjust REFISRC, REFISINK, VBGENDOC in PCIE PLL inits for all ECs
set EDMOD in RX VGA Control Register 1 for DD2 only
Change-Id: Ib10b02fb49dbf7ccf8dcad2ada5ac463a927d4c7
CQ: HW414759
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42423
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Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42431
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Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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Change-Id: I5a4b929fad4aa954ad413eb73861ab1e53135360
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42026
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42024
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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p9_frequency_buckets.H
p9.obus.pll.scan.initfile
document and support base frequencies
1611 MHz - 25.78G, 156.25 MHz ref
1250 MHz - 25G, 156.25 MHz ref
1200 MHz - 19.2G, 133.33 MHz ref
pervasive_attributes.xml
define ATTR_OB[0123]_PLL_BUCKET to hold encoded ring bucket select value
nest_attributes.xml
define ATTR_FREQ_O_MHZ array to hold per chiplet OBUS frequency
retain ATTR_FREQ_A_MHZ to serve as FBC A link frequency indicator
p9_setup_sbe_config.C
p9_sbe_attr_setup.C
transmit bucket selection through FSP/BMC->SBE mailbox
encode OBUS bucket selects in Scratch Reg2 bits 24:31
p9_sbe_chiplet_pll_initf.C
p9_sbe_chiplet_pll_initf_errors.xml
scan correct ring image based on bucket selector attributes
p9_ringId.C
p9_ringId.H
p9_ring_id.h
accomodate three copies of obX_pll_bndy (use ID previously reserved for
obX_pll_func, which should not be necessary to scan init)
scan_procedures.mk
generateWrapper.pl
initCompiler infrastructure changes to support build of bucket data
p9.fbc.ab_hp.scom.initfile
p9.fbc.ioo_tl.scom.initfile
p9_tod_setup.C
updates to handle A,O frequency attribute changes
Change-Id: I42f9bb4037a587f7e3ec8dd9848bdb853ac3d7a0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40159
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40165
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I2d873ea84b8ae202d78cf8c49ffce56caebd3699
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41052
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Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Change-Id: Ia891488d7de965a99c8cf3c457fccba9603773ad
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41136
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41167
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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1) Replace MCSMODE4 register with MCMODE2 and MCBCFGQ register
shift host attention enablement to p9c_set_inband_addr HWP
2) Update FIR registers'(ACT0,ACT1 and MASK) set from p8 to p9c
Change-Id: Ifdce2d948c12ad2b82a74cfc6a8731617a3086df
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39558
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39561
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I9ea515c64dbc7133a4443b458f367887581e662e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40561
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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