diff options
| author | Louis Stermole <stermole@us.ibm.com> | 2017-05-16 10:06:59 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-22 23:56:32 -0400 |
| commit | c4093b12fcf93c4088a9548e86ef0cc8d66074c1 (patch) | |
| tree | 595130e7c01373ac979d4ea2ddc58f6246093822 /src/import/chips/p9/common | |
| parent | 34e2682f180771ab78f43f4cc217d0e097c441c0 (diff) | |
| download | talos-hostboot-c4093b12fcf93c4088a9548e86ef0cc8d66074c1.tar.gz talos-hostboot-c4093b12fcf93c4088a9548e86ef0cc8d66074c1.zip | |
Add DDRPHY RD_VREF renamed or added regs for DD2.0 to platform header
Change-Id: I9ea515c64dbc7133a4443b458f367887581e662e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40561
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40567
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H | 884 | ||||
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H | 510 |
2 files changed, 1392 insertions, 2 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H index 15bf0df04..5646fb737 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -43,6 +43,888 @@ REG64( MCA_MBA_MCP0XLT0 , RULL(0x05010820), REG64( MCA_MBA_MCP0XLT1 , RULL(0x05010821), SH_UNT_MCA , SH_ACS_SCOM_RW ); REG64( MCA_MBA_MCP0XLT2 , RULL(0x05010822), SH_UNT_MCA , SH_ACS_SCOM_RW ); +// DDRPHY registers renamed in DD2.0 +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0 , RULL(0x800000160701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_0_P0_0 , RULL(0x800000160701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_0_P0_0 , RULL(0x800000160801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1 , RULL(0x800004160701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_0_P0_1 , RULL(0x800004160701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_0_P0_1 , RULL(0x800004160801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2 , RULL(0x800008160701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_0_P0_2 , RULL(0x800008160701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_0_P0_2 , RULL(0x800008160801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3 , RULL(0x80000C160701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_0_P0_3 , RULL(0x80000C160701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_0_P0_3 , RULL(0x80000C160801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4 , RULL(0x800010160701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_0_P0_4 , RULL(0x800010160701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_0_P0_4 , RULL(0x800010160801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_0_P1_0 , RULL(0x800000160701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_0_P1_0 , RULL(0x800000160801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_0_P1_1 , RULL(0x800004160701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_0_P1_1 , RULL(0x800004160801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_0_P1_2 , RULL(0x800008160701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_0_P1_2 , RULL(0x800008160801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_0_P1_3 , RULL(0x80000C160701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_0_P1_3 , RULL(0x80000C160801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_0_P1_4 , RULL(0x800010160701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_0_P1_4 , RULL(0x800010160801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_0_P2_0 , RULL(0x800000160701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_0_P2_0 , RULL(0x800000160801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_0_P2_1 , RULL(0x800004160701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_0_P2_1 , RULL(0x800004160801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_0_P2_2 , RULL(0x800008160701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_0_P2_2 , RULL(0x800008160801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_0_P2_3 , RULL(0x80000C160701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_0_P2_3 , RULL(0x80000C160801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_0_P2_4 , RULL(0x800010160701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_0_P2_4 , RULL(0x800010160801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_0_P3_0 , RULL(0x8000001607011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_0_P3_0 , RULL(0x8000001608011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_0_P3_1 , RULL(0x8000041607011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_0_P3_1 , RULL(0x8000041608011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_0_P3_2 , RULL(0x8000081607011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_0_P3_2 , RULL(0x8000081608011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_0_P3_3 , RULL(0x80000C1607011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_0_P3_3 , RULL(0x80000C1608011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_0_P3_4 , RULL(0x8000101607011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_0_P3_4 , RULL(0x8000101608011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0 , RULL(0x8000001F0701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_1_P0_0 , RULL(0x8000001F0701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_1_P0_0 , RULL(0x8000001F0801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1 , RULL(0x8000041F0701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_1_P0_1 , RULL(0x8000041F0701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_1_P0_1 , RULL(0x8000041F0801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2 , RULL(0x8000081F0701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_1_P0_2 , RULL(0x8000081F0701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_1_P0_2 , RULL(0x8000081F0801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3 , RULL(0x80000C1F0701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_1_P0_3 , RULL(0x80000C1F0701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_1_P0_3 , RULL(0x80000C1F0801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4 , RULL(0x8000101F0701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_1_P0_4 , RULL(0x8000101F0701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_1_P0_4 , RULL(0x8000101F0801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_1_P1_0 , RULL(0x8000001F0701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_1_P1_0 , RULL(0x8000001F0801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_1_P1_1 , RULL(0x8000041F0701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_1_P1_1 , RULL(0x8000041F0801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_1_P1_2 , RULL(0x8000081F0701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_1_P1_2 , RULL(0x8000081F0801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_1_P1_3 , RULL(0x80000C1F0701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_1_P1_3 , RULL(0x80000C1F0801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_1_P1_4 , RULL(0x8000101F0701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_1_P1_4 , RULL(0x8000101F0801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_1_P2_0 , RULL(0x8000001F0701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_1_P2_0 , RULL(0x8000001F0801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_1_P2_1 , RULL(0x8000041F0701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_1_P2_1 , RULL(0x8000041F0801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_1_P2_2 , RULL(0x8000081F0701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_1_P2_2 , RULL(0x8000081F0801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_1_P2_3 , RULL(0x80000C1F0701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_1_P2_3 , RULL(0x80000C1F0801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_1_P2_4 , RULL(0x8000101F0701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_1_P2_4 , RULL(0x8000101F0801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_1_P3_0 , RULL(0x8000001F07011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_1_P3_0 , RULL(0x8000001F08011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_1_P3_1 , RULL(0x8000041F07011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_1_P3_1 , RULL(0x8000041F08011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_1_P3_2 , RULL(0x8000081F07011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_1_P3_2 , RULL(0x8000081F08011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_1_P3_3 , RULL(0x80000C1F07011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_1_P3_3 , RULL(0x80000C1F08011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_1_P3_4 , RULL(0x8000101F07011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_1_P3_4 , RULL(0x8000101F08011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +// DDRPHY registers added in DD2.0 +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_0 , RULL(0x800000C00701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_2_P0_0 , RULL(0x800000C00701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_2_P0_0 , RULL(0x800000C00801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_1 , RULL(0x800004C00701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_2_P0_1 , RULL(0x800004C00701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_2_P0_1 , RULL(0x800004C00801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_2 , RULL(0x800008C00701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_2_P0_2 , RULL(0x800008C00701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_2_P0_2 , RULL(0x800008C00801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_3 , RULL(0x80000CC00701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_2_P0_3 , RULL(0x80000CC00701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_2_P0_3 , RULL(0x80000CC00801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_4 , RULL(0x800010C00701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_2_P0_4 , RULL(0x800010C00701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_2_P0_4 , RULL(0x800010C00801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_2_P1_0 , RULL(0x800000C00701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_2_P1_0 , RULL(0x800000C00801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_2_P1_1 , RULL(0x800004C00701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_2_P1_1 , RULL(0x800004C00801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_2_P1_2 , RULL(0x800008C00701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_2_P1_2 , RULL(0x800008C00801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_2_P1_3 , RULL(0x80000CC00701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_2_P1_3 , RULL(0x80000CC00801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_2_P1_4 , RULL(0x800010C00701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_2_P1_4 , RULL(0x800010C00801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_2_P2_0 , RULL(0x800000C00701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_2_P2_0 , RULL(0x800000C00801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_2_P2_1 , RULL(0x800004C00701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_2_P2_1 , RULL(0x800004C00801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_2_P2_2 , RULL(0x800008C00701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_2_P2_2 , RULL(0x800008C00801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_2_P2_3 , RULL(0x80000CC00701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_2_P2_3 , RULL(0x80000CC00801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_2_P2_4 , RULL(0x800010C00701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_2_P2_4 , RULL(0x800010C00801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_2_P3_0 , RULL(0x800000C007011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_2_P3_0 , RULL(0x800000C008011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_2_P3_1 , RULL(0x800004C007011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_2_P3_1 , RULL(0x800004C008011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_2_P3_2 , RULL(0x800008C007011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_2_P3_2 , RULL(0x800008C008011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_2_P3_3 , RULL(0x80000CC007011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_2_P3_3 , RULL(0x80000CC008011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_2_P3_4 , RULL(0x800010C007011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_2_P3_4 , RULL(0x800010C008011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_0 , RULL(0x800000C10701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_3_P0_0 , RULL(0x800000C10701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_3_P0_0 , RULL(0x800000C10801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_1 , RULL(0x800004C10701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_3_P0_1 , RULL(0x800004C10701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_3_P0_1 , RULL(0x800004C10801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_2 , RULL(0x800008C10701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_3_P0_2 , RULL(0x800008C10701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_3_P0_2 , RULL(0x800008C10801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_3 , RULL(0x80000CC10701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_3_P0_3 , RULL(0x80000CC10701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_3_P0_3 , RULL(0x80000CC10801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_4 , RULL(0x800010C10701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_3_P0_4 , RULL(0x800010C10701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_3_P0_4 , RULL(0x800010C10801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_3_P1_0 , RULL(0x800000C10701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_3_P1_0 , RULL(0x800000C10801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_3_P1_1 , RULL(0x800004C10701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_3_P1_1 , RULL(0x800004C10801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_3_P1_2 , RULL(0x800008C10701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_3_P1_2 , RULL(0x800008C10801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_3_P1_3 , RULL(0x80000CC10701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_3_P1_3 , RULL(0x80000CC10801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_3_P1_4 , RULL(0x800010C10701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_3_P1_4 , RULL(0x800010C10801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_3_P2_0 , RULL(0x800000C10701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_3_P2_0 , RULL(0x800000C10801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_3_P2_1 , RULL(0x800004C10701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_3_P2_1 , RULL(0x800004C10801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_3_P2_2 , RULL(0x800008C10701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_3_P2_2 , RULL(0x800008C10801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_3_P2_3 , RULL(0x80000CC10701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_3_P2_3 , RULL(0x80000CC10801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_3_P2_4 , RULL(0x800010C10701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_3_P2_4 , RULL(0x800010C10801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_3_P3_0 , RULL(0x800000C107011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_3_P3_0 , RULL(0x800000C108011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_3_P3_1 , RULL(0x800004C107011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_3_P3_1 , RULL(0x800004C108011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_3_P3_2 , RULL(0x800008C107011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_3_P3_2 , RULL(0x800008C108011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_3_P3_3 , RULL(0x80000CC107011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_3_P3_3 , RULL(0x80000CC108011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_3_P3_4 , RULL(0x800010C107011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_3_P3_4 , RULL(0x800010C108011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_0 , RULL(0x800000C20701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_4_P0_0 , RULL(0x800000C20701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_4_P0_0 , RULL(0x800000C20801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_1 , RULL(0x800004C20701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_4_P0_1 , RULL(0x800004C20701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_4_P0_1 , RULL(0x800004C20801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_2 , RULL(0x800008C20701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_4_P0_2 , RULL(0x800008C20701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_4_P0_2 , RULL(0x800008C20801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_3 , RULL(0x80000CC20701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_4_P0_3 , RULL(0x80000CC20701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_4_P0_3 , RULL(0x80000CC20801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_4 , RULL(0x800010C20701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_4_P0_4 , RULL(0x800010C20701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_4_P0_4 , RULL(0x800010C20801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_4_P1_0 , RULL(0x800000C20701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_4_P1_0 , RULL(0x800000C20801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_4_P1_1 , RULL(0x800004C20701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_4_P1_1 , RULL(0x800004C20801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_4_P1_2 , RULL(0x800008C20701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_4_P1_2 , RULL(0x800008C20801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_4_P1_3 , RULL(0x80000CC20701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_4_P1_3 , RULL(0x80000CC20801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_4_P1_4 , RULL(0x800010C20701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_4_P1_4 , RULL(0x800010C20801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_4_P2_0 , RULL(0x800000C20701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_4_P2_0 , RULL(0x800000C20801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_4_P2_1 , RULL(0x800004C20701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_4_P2_1 , RULL(0x800004C20801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_4_P2_2 , RULL(0x800008C20701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_4_P2_2 , RULL(0x800008C20801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_4_P2_3 , RULL(0x80000CC20701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_4_P2_3 , RULL(0x80000CC20801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_4_P2_4 , RULL(0x800010C20701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_4_P2_4 , RULL(0x800010C20801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_4_P3_0 , RULL(0x800000C207011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_4_P3_0 , RULL(0x800000C208011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_4_P3_1 , RULL(0x800004C207011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_4_P3_1 , RULL(0x800004C208011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_4_P3_2 , RULL(0x800008C207011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_4_P3_2 , RULL(0x800008C208011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_4_P3_3 , RULL(0x80000CC207011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_4_P3_3 , RULL(0x80000CC208011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_4_P3_4 , RULL(0x800010C207011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_4_P3_4 , RULL(0x800010C208011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_0 , RULL(0x800000C30701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_5_P0_0 , RULL(0x800000C30701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_5_P0_0 , RULL(0x800000C30801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_1 , RULL(0x800004C30701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_5_P0_1 , RULL(0x800004C30701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_5_P0_1 , RULL(0x800004C30801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_2 , RULL(0x800008C30701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_5_P0_2 , RULL(0x800008C30701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_5_P0_2 , RULL(0x800008C30801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_3 , RULL(0x80000CC30701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_5_P0_3 , RULL(0x80000CC30701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_5_P0_3 , RULL(0x80000CC30801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_4 , RULL(0x800010C30701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_5_P0_4 , RULL(0x800010C30701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_5_P0_4 , RULL(0x800010C30801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_5_P1_0 , RULL(0x800000C30701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_5_P1_0 , RULL(0x800000C30801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_5_P1_1 , RULL(0x800004C30701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_5_P1_1 , RULL(0x800004C30801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_5_P1_2 , RULL(0x800008C30701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_5_P1_2 , RULL(0x800008C30801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_5_P1_3 , RULL(0x80000CC30701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_5_P1_3 , RULL(0x80000CC30801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_5_P1_4 , RULL(0x800010C30701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_5_P1_4 , RULL(0x800010C30801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_5_P2_0 , RULL(0x800000C30701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_5_P2_0 , RULL(0x800000C30801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_5_P2_1 , RULL(0x800004C30701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_5_P2_1 , RULL(0x800004C30801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_5_P2_2 , RULL(0x800008C30701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_5_P2_2 , RULL(0x800008C30801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_5_P2_3 , RULL(0x80000CC30701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_5_P2_3 , RULL(0x80000CC30801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_5_P2_4 , RULL(0x800010C30701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_5_P2_4 , RULL(0x800010C30801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_5_P3_0 , RULL(0x800000C307011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_5_P3_0 , RULL(0x800000C308011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_5_P3_1 , RULL(0x800004C307011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_5_P3_1 , RULL(0x800004C308011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_5_P3_2 , RULL(0x800008C307011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_5_P3_2 , RULL(0x800008C308011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_5_P3_3 , RULL(0x80000CC307011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_5_P3_3 , RULL(0x80000CC308011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_5_P3_4 , RULL(0x800010C307011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_5_P3_4 , RULL(0x800010C308011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_0 , RULL(0x800000C40701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_6_P0_0 , RULL(0x800000C40701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_6_P0_0 , RULL(0x800000C40801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_1 , RULL(0x800004C40701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_6_P0_1 , RULL(0x800004C40701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_6_P0_1 , RULL(0x800004C40801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_2 , RULL(0x800008C40701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_6_P0_2 , RULL(0x800008C40701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_6_P0_2 , RULL(0x800008C40801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_3 , RULL(0x80000CC40701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_6_P0_3 , RULL(0x80000CC40701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_6_P0_3 , RULL(0x80000CC40801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_4 , RULL(0x800010C40701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_6_P0_4 , RULL(0x800010C40701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_6_P0_4 , RULL(0x800010C40801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_6_P1_0 , RULL(0x800000C40701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_6_P1_0 , RULL(0x800000C40801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_6_P1_1 , RULL(0x800004C40701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_6_P1_1 , RULL(0x800004C40801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_6_P1_2 , RULL(0x800008C40701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_6_P1_2 , RULL(0x800008C40801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_6_P1_3 , RULL(0x80000CC40701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_6_P1_3 , RULL(0x80000CC40801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_6_P1_4 , RULL(0x800010C40701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_6_P1_4 , RULL(0x800010C40801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_6_P2_0 , RULL(0x800000C40701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_6_P2_0 , RULL(0x800000C40801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_6_P2_1 , RULL(0x800004C40701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_6_P2_1 , RULL(0x800004C40801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_6_P2_2 , RULL(0x800008C40701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_6_P2_2 , RULL(0x800008C40801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_6_P2_3 , RULL(0x80000CC40701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_6_P2_3 , RULL(0x80000CC40801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_6_P2_4 , RULL(0x800010C40701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_6_P2_4 , RULL(0x800010C40801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_6_P3_0 , RULL(0x800000C407011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_6_P3_0 , RULL(0x800000C408011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_6_P3_1 , RULL(0x800004C407011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_6_P3_1 , RULL(0x800004C408011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_6_P3_2 , RULL(0x800008C407011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_6_P3_2 , RULL(0x800008C408011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_6_P3_3 , RULL(0x80000CC407011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_6_P3_3 , RULL(0x80000CC408011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_6_P3_4 , RULL(0x800010C407011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_6_P3_4 , RULL(0x800010C408011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_0 , RULL(0x800000C50701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_7_P0_0 , RULL(0x800000C50701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_7_P0_0 , RULL(0x800000C50801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_1 , RULL(0x800004C50701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_7_P0_1 , RULL(0x800004C50701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_7_P0_1 , RULL(0x800004C50801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_2 , RULL(0x800008C50701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_7_P0_2 , RULL(0x800008C50701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_7_P0_2 , RULL(0x800008C50801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_3 , RULL(0x80000CC50701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_7_P0_3 , RULL(0x80000CC50701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_7_P0_3 , RULL(0x80000CC50801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4 , RULL(0x800010C50701103F), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCA_0_DDRPHY_DP16_RD_VREF_DAC_7_P0_4 , RULL(0x800010C50701103F), SH_UNT_MCA_0 , + SH_ACS_SCOM_RW ); +REG64( MCA_4_DDRPHY_DP16_RD_VREF_DAC_7_P0_4 , RULL(0x800010C50801103F), SH_UNT_MCA_4 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_7_P1_0 , RULL(0x800000C50701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_7_P1_0 , RULL(0x800000C50801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_7_P1_1 , RULL(0x800004C50701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_7_P1_1 , RULL(0x800004C50801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_7_P1_2 , RULL(0x800008C50701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_7_P1_2 , RULL(0x800008C50801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_7_P1_3 , RULL(0x80000CC50701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_7_P1_3 , RULL(0x80000CC50801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_1_DDRPHY_DP16_RD_VREF_DAC_7_P1_4 , RULL(0x800010C50701143F), SH_UNT_MCA_1 , + SH_ACS_SCOM_RW ); +REG64( MCA_5_DDRPHY_DP16_RD_VREF_DAC_7_P1_4 , RULL(0x800010C50801143F), SH_UNT_MCA_5 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_7_P2_0 , RULL(0x800000C50701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_7_P2_0 , RULL(0x800000C50801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_7_P2_1 , RULL(0x800004C50701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_7_P2_1 , RULL(0x800004C50801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_7_P2_2 , RULL(0x800008C50701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_7_P2_2 , RULL(0x800008C50801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_7_P2_3 , RULL(0x80000CC50701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_7_P2_3 , RULL(0x80000CC50801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_2_DDRPHY_DP16_RD_VREF_DAC_7_P2_4 , RULL(0x800010C50701183F), SH_UNT_MCA_2 , + SH_ACS_SCOM_RW ); +REG64( MCA_6_DDRPHY_DP16_RD_VREF_DAC_7_P2_4 , RULL(0x800010C50801183F), SH_UNT_MCA_6 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_7_P3_0 , RULL(0x800000C507011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_7_P3_0 , RULL(0x800000C508011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_7_P3_1 , RULL(0x800004C507011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_7_P3_1 , RULL(0x800004C508011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_7_P3_2 , RULL(0x800008C507011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_7_P3_2 , RULL(0x800008C508011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_7_P3_3 , RULL(0x80000CC507011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_7_P3_3 , RULL(0x80000CC508011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + +REG64( MCA_3_DDRPHY_DP16_RD_VREF_DAC_7_P3_4 , RULL(0x800010C507011C3F), SH_UNT_MCA_3 , + SH_ACS_SCOM_RW ); +REG64( MCA_7_DDRPHY_DP16_RD_VREF_DAC_7_P3_4 , RULL(0x800010C508011C3F), SH_UNT_MCA_7 , + SH_ACS_SCOM_RW ); + // FIXREG64( MCBIST_MCBIST_CCSARRERRINJQ , RULL(0x07010FDE), SH_UNT_MCBIST , // SH_ACS_SCOM_RW , RULL(0x0701219E) ); // FIXREG64( MCBIST_MCBIST_0_CCSARRERRINJQ , RULL(0x07010FDE), SH_UNT_MCBIST_0 , diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H index ef6af5669..1a7dc1d70 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H @@ -48,7 +48,105 @@ static const uint64_t SH_FLD_COMMAND_LIST_TIMEOUT_SPEC = 99990000; static const uint64_t SH_FLD_CFG_PAUSE_ON_MCE = 99990001; - +static const uint64_t SH_FLD_01_BIT0 = 99990002; +static const uint64_t SH_FLD_01_BIT0_LEN = 99990003; +static const uint64_t SH_FLD_23_BIT0 = 99990004; +static const uint64_t SH_FLD_23_BIT0_LEN = 99990005; +static const uint64_t SH_FLD_4_BIT0 = 99990006; +static const uint64_t SH_FLD_4_BIT0_LEN = 99990007; +static const uint64_t SH_FLD_01_BIT1 = 99990008; +static const uint64_t SH_FLD_01_BIT1_LEN = 99990009; +static const uint64_t SH_FLD_23_BIT1 = 99990010; +static const uint64_t SH_FLD_23_BIT1_LEN = 99990011; +static const uint64_t SH_FLD_4_BIT1 = 99990012; +static const uint64_t SH_FLD_4_BIT1_LEN = 99990013; +static const uint64_t SH_FLD_01_BIT2 = 99990014; +static const uint64_t SH_FLD_01_BIT2_LEN = 99990015; +static const uint64_t SH_FLD_23_BIT2 = 99990016; +static const uint64_t SH_FLD_23_BIT2_LEN = 99990017; +static const uint64_t SH_FLD_4_BIT2 = 99990018; +static const uint64_t SH_FLD_4_BIT2_LEN = 99990019; +static const uint64_t SH_FLD_01_BIT3 = 99990020; +static const uint64_t SH_FLD_01_BIT3_LEN = 99990021; +static const uint64_t SH_FLD_23_BIT3 = 99990022; +static const uint64_t SH_FLD_23_BIT3_LEN = 99990023; +static const uint64_t SH_FLD_4_BIT3 = 99990024; +static const uint64_t SH_FLD_4_BIT3_LEN = 99990025; +static const uint64_t SH_FLD_01_BIT4 = 99990026; +static const uint64_t SH_FLD_01_BIT4_LEN = 99990027; +static const uint64_t SH_FLD_23_BIT4 = 99990028; +static const uint64_t SH_FLD_23_BIT4_LEN = 99990029; +static const uint64_t SH_FLD_4_BIT4 = 99990030; +static const uint64_t SH_FLD_4_BIT4_LEN = 99990031; +static const uint64_t SH_FLD_01_BIT5 = 99990032; +static const uint64_t SH_FLD_01_BIT5_LEN = 99990033; +static const uint64_t SH_FLD_23_BIT5 = 99990034; +static const uint64_t SH_FLD_23_BIT5_LEN = 99990035; +static const uint64_t SH_FLD_4_BIT5 = 99990036; +static const uint64_t SH_FLD_4_BIT5_LEN = 99990037; +static const uint64_t SH_FLD_01_BIT6 = 99990038; +static const uint64_t SH_FLD_01_BIT6_LEN = 99990039; +static const uint64_t SH_FLD_23_BIT6 = 99990040; +static const uint64_t SH_FLD_23_BIT6_LEN = 99990041; +static const uint64_t SH_FLD_4_BIT6 = 99990042; +static const uint64_t SH_FLD_4_BIT6_LEN = 99990043; +static const uint64_t SH_FLD_01_BIT7 = 99990044; +static const uint64_t SH_FLD_01_BIT7_LEN = 99990045; +static const uint64_t SH_FLD_23_BIT7 = 99990046; +static const uint64_t SH_FLD_23_BIT7_LEN = 99990047; +static const uint64_t SH_FLD_4_BIT7 = 99990048; +static const uint64_t SH_FLD_4_BIT7_LEN = 99990049; +static const uint64_t SH_FLD_01_BIT8 = 99990050; +static const uint64_t SH_FLD_01_BIT8_LEN = 99990051; +static const uint64_t SH_FLD_23_BIT8 = 99990052; +static const uint64_t SH_FLD_23_BIT8_LEN = 99990053; +static const uint64_t SH_FLD_4_BIT8 = 99990054; +static const uint64_t SH_FLD_4_BIT8_LEN = 99990055; +static const uint64_t SH_FLD_01_BIT9 = 99990056; +static const uint64_t SH_FLD_01_BIT9_LEN = 99990057; +static const uint64_t SH_FLD_23_BIT9 = 99990058; +static const uint64_t SH_FLD_23_BIT9_LEN = 99990059; +static const uint64_t SH_FLD_4_BIT9 = 99990060; +static const uint64_t SH_FLD_4_BIT9_LEN = 99990061; +static const uint64_t SH_FLD_01_BIT10 = 99990062; +static const uint64_t SH_FLD_01_BIT10_LEN = 99990063; +static const uint64_t SH_FLD_23_BIT10 = 99990064; +static const uint64_t SH_FLD_23_BIT10_LEN = 99990065; +static const uint64_t SH_FLD_4_BIT10 = 99990066; +static const uint64_t SH_FLD_4_BIT10_LEN = 99990067; +static const uint64_t SH_FLD_01_BIT11 = 99990068; +static const uint64_t SH_FLD_01_BIT11_LEN = 99990069; +static const uint64_t SH_FLD_23_BIT11 = 99990070; +static const uint64_t SH_FLD_23_BIT11_LEN = 99990071; +static const uint64_t SH_FLD_4_BIT11 = 99990072; +static const uint64_t SH_FLD_4_BIT11_LEN = 99990073; +static const uint64_t SH_FLD_01_BIT12 = 99990074; +static const uint64_t SH_FLD_01_BIT12_LEN = 99990075; +static const uint64_t SH_FLD_23_BIT12 = 99990076; +static const uint64_t SH_FLD_23_BIT12_LEN = 99990077; +static const uint64_t SH_FLD_4_BIT12 = 99990078; +static const uint64_t SH_FLD_4_BIT12_LEN = 99990079; +static const uint64_t SH_FLD_01_BIT13 = 99990080; +static const uint64_t SH_FLD_01_BIT13_LEN = 99990081; +static const uint64_t SH_FLD_23_BIT13 = 99990082; +static const uint64_t SH_FLD_23_BIT13_LEN = 99990083; +static const uint64_t SH_FLD_4_BIT13 = 99990084; +static const uint64_t SH_FLD_4_BIT13_LEN = 99990085; +static const uint64_t SH_FLD_01_BIT14 = 99990086; +static const uint64_t SH_FLD_01_BIT14_LEN = 99990087; +static const uint64_t SH_FLD_23_BIT14 = 99990088; +static const uint64_t SH_FLD_23_BIT14_LEN = 99990089; +static const uint64_t SH_FLD_4_BIT14 = 99990090; +static const uint64_t SH_FLD_4_BIT14_LEN = 99990091; +static const uint64_t SH_FLD_01_BIT15 = 99990092; +static const uint64_t SH_FLD_01_BIT15_LEN = 99990093; +static const uint64_t SH_FLD_23_BIT15 = 99990094; +static const uint64_t SH_FLD_23_BIT15_LEN = 99990095; +static const uint64_t SH_FLD_4_BIT15 = 99990096; +static const uint64_t SH_FLD_4_BIT15_LEN = 99990097; +static const uint64_t SH_FLD_01_DD2_PERBIT_RDVREF_DISABLE = 99990098; +static const uint64_t SH_FLD_23_DD2_PERBIT_RDVREF_DISABLE = 99990099; +static const uint64_t SH_FLD_4_DD2_PERBIT_RDVREF_DISABLE = 99990100; REG64_FLD( MCA_DDRPHY_DP16_SYSCLK_PR0_P0_0_01_ENABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , 0 ); @@ -73,6 +171,416 @@ REG64_FLD( MCS_MCMODE0_DISABLE_MC_SYNC , 27 , SH_UN REG64_FLD( MCS_MCMODE0_DISABLE_MC_PAIR_SYNC , 28 , SH_UNT_MCS , SH_ACS_SCOM_RW , 0 ); +// DDRPHY fields renamed in DD2.0 +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0_01_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0_01_BIT0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT0 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0_01_BIT0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT0_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0_01_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0_01_BIT1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT1 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0_01_BIT1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT1_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1_01_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1_01_BIT0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT0 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1_01_BIT0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT0_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1_01_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1_01_BIT1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT1 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_1_01_BIT1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT1_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2_23_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2_23_BIT0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT0 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2_23_BIT0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT0_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2_23_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2_23_BIT1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT1 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_2_23_BIT1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT1_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3_23_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3_23_BIT0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT0 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3_23_BIT0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT0_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3_23_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3_23_BIT1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT1 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_3_23_BIT1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT1_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4_4_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4_4_BIT0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT0 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4_4_BIT0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT0_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4_4_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4_4_BIT1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT1 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_4_4_BIT1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT1_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0_01_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0_01_BIT2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT2 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0_01_BIT2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT2_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0_01_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0_01_BIT3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT3 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_0_01_BIT3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT3_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1_01_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1_01_BIT2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT2 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1_01_BIT2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT2_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1_01_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1_01_BIT3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT3 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_1_01_BIT3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT3_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2_23_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2_23_BIT2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT2 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2_23_BIT2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT2_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2_23_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2_23_BIT3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT3 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_2_23_BIT3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT3_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3_23_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3_23_BIT2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT2 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3_23_BIT2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT2_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3_23_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3_23_BIT3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT3 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_3_23_BIT3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT3_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4_4_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4_4_BIT2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT2 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4_4_BIT2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT2_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4_4_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4_4_BIT3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT3 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_1_P0_4_4_BIT3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT3_LEN ); + +// DDRPHY fields added in DD2.0 +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_0_01_BIT4 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT4 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_0_01_BIT4_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT4_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_0_01_BIT5 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT5 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_0_01_BIT5_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT5_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_1_01_BIT4 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT4 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_1_01_BIT4_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT4_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_1_01_BIT5 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT5 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_1_01_BIT5_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT5_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_2_23_BIT4 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT4 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_2_23_BIT4_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT4_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_2_23_BIT5 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT5 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_2_23_BIT5_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT5_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_3_23_BIT4 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT4 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_3_23_BIT4_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT4_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_3_23_BIT5 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT5 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_3_23_BIT5_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT5_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_4_4_BIT4 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT4 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_4_4_BIT4_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT4_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_4_4_BIT5 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT5 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_2_P0_4_4_BIT5_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT5_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_0_01_BIT6 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT6 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_0_01_BIT6_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT6_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_0_01_BIT7 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT7 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_0_01_BIT7_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT7_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_1_01_BIT6 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT6 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_1_01_BIT6_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT6_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_1_01_BIT7 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT7 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_1_01_BIT7_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT7_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_2_23_BIT6 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT6 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_2_23_BIT6_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT6_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_2_23_BIT7 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT7 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_2_23_BIT7_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT7_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_3_23_BIT6 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT6 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_3_23_BIT6_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT6_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_3_23_BIT7 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT7 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_3_23_BIT7_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT7_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_4_4_BIT6 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT6 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_4_4_BIT6_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT6_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_4_4_BIT7 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT7 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_3_P0_4_4_BIT7_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT7_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_0_01_BIT8 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT8 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_0_01_BIT8_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT8_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_0_01_BIT9 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT9 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_0_01_BIT9_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT9_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_1_01_BIT8 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT8 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_1_01_BIT8_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT8_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_1_01_BIT9 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT9 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_1_01_BIT9_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT9_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_2_23_BIT8 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT8 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_2_23_BIT8_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT8_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_2_23_BIT9 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT9 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_2_23_BIT9_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT9_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_3_23_BIT8 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT8 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_3_23_BIT8_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT8_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_3_23_BIT9 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT9 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_3_23_BIT9_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT9_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_4_4_BIT8 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT8 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_4_4_BIT8_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT8_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_4_4_BIT9 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT9 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_4_P0_4_4_BIT9_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT9_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_0_01_BIT10 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT10 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_0_01_BIT10_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT10_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_0_01_BIT11 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT11 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_0_01_BIT11_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT11_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_1_01_BIT10 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT10 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_1_01_BIT10_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT10_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_1_01_BIT11 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT11 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_1_01_BIT11_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT11_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_2_23_BIT10 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT10 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_2_23_BIT10_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT10_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_2_23_BIT11 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT11 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_2_23_BIT11_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT11_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_3_23_BIT10 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT10 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_3_23_BIT10_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT10_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_3_23_BIT11 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT11 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_3_23_BIT11_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT11_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_4_4_BIT10 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT10 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_4_4_BIT10_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT10_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_4_4_BIT11 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT11 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_5_P0_4_4_BIT11_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT11_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_0_01_BIT12 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT12 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_0_01_BIT12_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT12_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_0_01_BIT13 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT13 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_0_01_BIT13_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT13_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_1_01_BIT12 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT12 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_1_01_BIT12_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT12_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_1_01_BIT13 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT13 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_1_01_BIT13_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT13_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_2_23_BIT12 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT12 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_2_23_BIT12_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT12_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_2_23_BIT13 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT13 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_2_23_BIT13_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT13_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_3_23_BIT12 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT12 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_3_23_BIT12_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT12_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_3_23_BIT13 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT13 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_3_23_BIT13_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT13_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_4_4_BIT12 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT12 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_4_4_BIT12_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT12_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_4_4_BIT13 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT13 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_6_P0_4_4_BIT13_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT13_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_0_01_DD2_PERBIT_RDVREF_DISABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DD2_PERBIT_RDVREF_DISABLE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_0_01_BIT14 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT14 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_0_01_BIT14_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT14_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_0_01_BIT15 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT15 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_0_01_BIT15_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT15_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_1_01_DD2_PERBIT_RDVREF_DISABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DD2_PERBIT_RDVREF_DISABLE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_1_01_BIT14 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT14 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_1_01_BIT14_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT14_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_1_01_BIT15 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT15 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_1_01_BIT15_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_BIT15_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_2_23_DD2_PERBIT_RDVREF_DISABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_DD2_PERBIT_RDVREF_DISABLE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_2_23_BIT14 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT14 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_2_23_BIT14_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT14_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_2_23_BIT15 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT15 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_2_23_BIT15_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT15_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_3_23_DD2_PERBIT_RDVREF_DISABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_DD2_PERBIT_RDVREF_DISABLE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_3_23_BIT14 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT14 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_3_23_BIT14_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT14_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_3_23_BIT15 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT15 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_3_23_BIT15_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_BIT15_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_DD2_PERBIT_RDVREF_DISABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_DD2_PERBIT_RDVREF_DISABLE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_BIT14 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT14 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_BIT14_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT14_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_BIT15 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT15 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_BIT15_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_BIT15_LEN ); #endif |
