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| author | Soma BhanuTej <soma.bhanu@in.ibm.com> | 2017-01-16 11:21:06 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-18 00:30:46 -0400 |
| commit | f6df91cc6f5beee527aae6acb180ba20ad9c4269 (patch) | |
| tree | 41531824790a1f19574ddcc9628db3f259bf6fa2 /src/import/chips/p9/common | |
| parent | cbf9345103f6bace10354c12ac56defca97f18bf (diff) | |
| download | talos-hostboot-f6df91cc6f5beee527aae6acb180ba20ad9c4269.tar.gz talos-hostboot-f6df91cc6f5beee527aae6acb180ba20ad9c4269.zip | |
Synchronous stopclk procedure for Quad
Change-Id: Id31daf8c02b74d979927540346a3cef5f88768be
RTC: 175615
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34935
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Dev-Ready: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34940
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_const_common.H | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/src/import/chips/p9/common/include/p9_const_common.H b/src/import/chips/p9/common/include/p9_const_common.H index 4d62685b0..5b325a13f 100644 --- a/src/import/chips/p9/common/include/p9_const_common.H +++ b/src/import/chips/p9/common/include/p9_const_common.H @@ -78,24 +78,25 @@ struct has_fixfld static const uint8_t value = 255; }; -const uint32_t N0_CHIPLET_ID = 2; -const uint32_t N1_CHIPLET_ID = 3; -const uint32_t N2_CHIPLET_ID = 4; -const uint32_t N3_CHIPLET_ID = 5; -const uint32_t XB_CHIPLET_ID = 6; -const uint32_t MC01_CHIPLET_ID = 7; -const uint32_t MC23_CHIPLET_ID = 8; -const uint32_t OB0_CHIPLET_ID = 9; -const uint32_t OB1_CHIPLET_ID = 10; -const uint32_t OB2_CHIPLET_ID = 11; -const uint32_t OB3_CHIPLET_ID = 12; -const uint32_t PCI0_CHIPLET_ID = 13; -const uint32_t PCI1_CHIPLET_ID = 14; -const uint32_t PCI2_CHIPLET_ID = 15; -const uint32_t EC0_CHIPLET_ID = 0x20; +const uint32_t PERV_CHIPLET_ID = 0x01; +const uint32_t N0_CHIPLET_ID = 0x02; +const uint32_t N1_CHIPLET_ID = 0x03; +const uint32_t N2_CHIPLET_ID = 0x04; +const uint32_t N3_CHIPLET_ID = 0x05; +const uint32_t XB_CHIPLET_ID = 0x06; +const uint32_t MC01_CHIPLET_ID = 0x07; +const uint32_t MC23_CHIPLET_ID = 0x08; +const uint32_t OB0_CHIPLET_ID = 0x09; +const uint32_t OB1_CHIPLET_ID = 0x0A; +const uint32_t OB2_CHIPLET_ID = 0x0B; +const uint32_t OB3_CHIPLET_ID = 0x0C; +const uint32_t PCI0_CHIPLET_ID = 0x0D; +const uint32_t PCI1_CHIPLET_ID = 0x0E; +const uint32_t PCI2_CHIPLET_ID = 0x0F; +const uint32_t EC0_CHIPLET_ID = 0x20; const uint32_t EC23_CHIPLET_ID = 0x37; -const uint32_t EQ0_CHIPLET_ID = 0x10; -const uint32_t EQ5_CHIPLET_ID = 0x15; +const uint32_t EQ0_CHIPLET_ID = 0x10; +const uint32_t EQ5_CHIPLET_ID = 0x15; #define FIXREG8(name, expr, unit, meth, newexpr) template<> struct has_fixup<uint8_t,unit,meth,expr> { static const uint8_t value = newexpr; }; #define FIXREG32(name, expr, unit, meth, newexpr) template<> struct has_fixup<uint32_t,unit,meth,expr> { static const uint32_t value = newexpr; }; #define FIXREG64(name, expr, unit, meth, newexpr) template<> struct has_fixup<uint64_t,unit,meth,expr> { static const uint64_t value = newexpr; }; |
