| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: Ic5f234e0ce0747f887a706054f82372c9a96258c
RTC:126640
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19041
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Includes changes for nimbus.por
Making recent Simics usable by Hostboot
Removing portions of code not yet ready
Basic LPC read/write
Change-Id: Ic40a9613934fab7bb6a28a8100685496246bb5ea
RTC:132170
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21931
Tested-by: Jenkins Server
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: Christian Geddes <crgeddes@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Generated mvpd dat file containing records used for simics
to run the nimbus model
Change-Id: If2a2a9c9e325f11d59c845f92b3f338025f3564f
RTC:127341
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18658
Tested-by: Jenkins Server
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7
RTC: 126637
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321
Tested-by: Jenkins Server
Reviewed-by: Christian Geddes <crgeddes@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Methods ported over from code in EKB.
Change-Id: I26b6f2326314936b0316f64272230730ecd3f9ee
RTC: 126634
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17465
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I784dc78e181626fbda66c7401c376adeeb61726d
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13833
Tested-by: Jenkins Server
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added NO_SP to hb-pnor-vpd-preload.pl
Change-Id: I5c843223366018d796e57de4fcf4befdbcc792ed
CQ:SW283787
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14198
Tested-by: Jenkins Server
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 95325
Change-Id: Iccc99e293c7031a4d926be061c7a41b8c55f8f13
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13326
Tested-by: Jenkins Server
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ie4a93174534e71118504a26b291b329e4bdeb699
CMVC-Prereq: 928342
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11425
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I6544b475446bf07e6d56d571534d06147218f476
RTC: 99671
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9500
Tested-by: Jenkins Server
Reviewed-by: William H. Schwartz <whs@us.ibm.com>
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iec0bc0506c1f676ec8ebec821a19c3246c46838f
RTC:65006
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7830
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Along with some SBE Update improvements, this commit adds
additional code to re-IPL the system after an SBE Update has
taken place. NOTE: Full SBE Update code path to be
enabled with RTC 89503.
Change-Id: I6beaee026d3fc6aaa76bfc7ca387d6765754f0c3
RTC: 47033
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6986
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iff5af2b026c7096bb47ccc66144afe29ff14a92b
RTC: 92235
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7402
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Fixed standalone.simics to trigger SBE start
Change-Id: I9dd104616c2cb288aec26992c966162830703d0f
CQ: SW227791
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6737
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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1) Moved hardcoded cpu to 1 place only
2) Attempt to use Simics commands for masterproc
Change-Id: If6bb1f60342d16da54cb558a4092425da2ed1215
RTC: 51267
CQ: SW214903
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5509
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: If87eedf15c1ef96ea00c1a5574ad1f6b72e697b5
RTC: 71881
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5498
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ibde8e90959ee82d3c4f1dfac2ee90ca150a7087d
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5225
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I74823572a4935d3c8c4d7999d8c00c0286de1523
RTC: 50233
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5170
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Changes include the following:
- Fix for modified slave break behavior
- Xscom chipid bug fix
RTC: 64149
Change-Id: Icd9c93ed265f0004ab4a726fcc01bde0cbe3eadf
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5097
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Modified FSI path for proc1 due to Simics model changes
Fix FSI testcase that was using outdated version reg
Enhance standalone script to start SBE on all procs
Change-Id: I2758912914b778a2c430124678546175e6223e30
RTC: 51465
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4357
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Removing some old workarounds that are no longer needed as they
are causing problems with the Brazos bringup
Change-Id: I8c1db34e38f22b38a33a6cdbd0a9aa91f189889d
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3949
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Quick fix to support the new object names in the Brazos Simics
model. There are more changes required to support multinode
(see RTC: 61853) but this should work for single node bringup.
Change-Id: If0c591a2ae7c6665dcf76aa4a2e5a904455da4dd
RTC: 68898
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3955
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Cleaning up a number of things under this commit:
-Changed to always assume FSP performed SFC Setup
-Get Erase block size based on what FSP Building Block
set it to
-Re-ordered some switch to put most likely choice first
-Converted some else/if statements to switch statements
-Added some shutdown calls on error paths.
RTC: 47066
Change-Id: I015bb90b67ead9ad34e2ea1827cc92f7966d3162
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3183
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added a --forceCent parm similar to the --forceProc parm. It
overrides the default plugging rules for Centaur chips.
I also added a --examples option which prints examples of common
use cases to help people remember.
Change-Id: I933a1897581530b5f89afd1a8ee5a97b2b40d98e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3219
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Implemented Device Driver support for Centaur VPD.
Since CVPD is almost identical to MVPD, I moved the MVPD
code to a base class so the actual logic is now common between
the two. To support CVPD in the standalone configs, the
hb-preload script was updated to populate the CVPD partition
as well. I also started migrating the VPD code to a common
trace buffer.
RTC: 44009
Change-Id: I6e96d5e993d6d74d40df3d296cdcf8f34e4b5cc5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3029
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Updating the doShutdown path to support receiving a reason
code as input. Then changing PNOR RP to issue a shutdown
when problems are detected with the PNOR Partition table.
RTC: 44146
Change-Id: Ib4111d0a91f53d90fa100422a1463539897598e6
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3024
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Since HW Server now supports populating the VPD Partitions in
PNOR, the pre-load script is no longer needed. It currently only
supports Tuleta, which causes issues when trying to load other
systems, thus motiviating making this change now.
Change-Id: Ib5ca3ab3db6a2580375a8c3f4322a4e31a679be4
RTC: 62179
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2946
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iedaa42e227172ea7fdfe175b4343c4a269a44b73
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2905
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Enable slave core execution on master proc and slave proc
Change-Id: I990ecb3d82b1b06fd64e085071ae1880818ca1d8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2858
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ice7df0084dbc053f07947416ef01a969c46b142e
RTC: 60780
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2797
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ibcc0be1c8fa24fb4f188e338a52992da4262328c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2743
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Add the SBE and secureboot header to the hostboot base image
and enable simics to actually pull the image from PNOR
instead of directly stuffing cache from file. Also enables
Hostboot to execute from HRMOR of 128MB and updates cit
script to handle HRMOR
Change-Id: Ie414a5f8e43dadf03538d7435f742b2d79db431b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2473
Tested-by: Jenkins Server
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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The current Micron parts require some special operations after a
read or write operation, otherwise future operations won't work.
Change-Id: I2d733da57cd0b05fa5a8ba962f87d7fabb3d5267
RTC: 53201
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2491
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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-Reduced the size of VPD partitions to squeeze in Winkle and
Error log paritions.
-Winkle and Error log partitions are smaller than production size
to fit within fake-PNOR, but big enough to be functional
-Deliviring more tools as part of VPO release to enable automation
of figuring out VPD offsets, generating VPD, etc.
Change-Id: I901cc895fbdb04837bd662329dc0c02d26e4b63f
RTC: 49033
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2181
Tested-by: Jenkins Server
Reviewed-by: Terry J. Opie <opiet@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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-Updated the default PNOR layout to include all partitions
-PNOR Layout now matches PNOR Spec layout, but only single side
-Updated PNORRP to support all partitions
-Updated PNORDD to more efficiently track erases
-Added 4-byte addressing workaround to combined.simics to
workaround SW170513 for FSP PNOR access.
-Disabled test image in VBU to save space since it is
not used anyway
Change-Id: Ifadd21829b78868a1f2d8b762420a24f256f7a7e
RTC: 49033
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2091
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Hardware Server is in the process of enabling function that will
update PNOR with the hostboot base and extended images found
on the FSP during the IPL. This change triggers a copy command
to be run on the FSP which overwrites the default images
with patch images when in the Hostboot Developer Environment.
Note: This change is backwards compatible, so it does
not need to be co-reqed with an FSP driver.
Change-Id: I5f3dbc49ba66141c63522191721d3e09cd37e6d9
RTC:51082
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2076
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Terry J. Opie <opiet@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The original assumptions regarding the DIMM plugging order in
hb-pnor-mvpd-preload.pl was incorrect for Tuleta. I updated
to be correct.
In a few weeks we should be able to disable this code, but
it's needed for the moment to support the Multi-chip bringup
efforts.
This issue was identified with Defect SW168323.
Change-Id: I3bae0aebbabc9da07f87f379a2f6c2dd15db15c8
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 37009
Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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We were loading the VPD image files in a way that was causing
checkpoints of the PNOR FPGA object to have references to the
image files we create in the simics root. When PHYP tries to
make checkpoints for their developers they don't keep these
files around and so they cannot restore the checkpoints.
Use load instead of add-diff-file to force the PNOR FPGA
object to have the raw data instead of a reference to a file.
Change-Id: I7c01499b80de74da436b7b9ae5b67b007a1110e3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1350
Reviewed-by: Terry J. Opie <opiet@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 44240
Change-Id: I8767265b5f5eccfda2c748c9b0d51027dffbb7eb
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1250
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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See SW149779. The PHYP simics model is changing the location of
phys_mem to be under system_cmp0 and renaming venice_cec_chip_cmp0
to proc_venicechip_cmp0. Change our debug and startup scripts
to match these new naming conventions.
Change-Id: I32b2ff8fa3467806ac4d7fac1b8b2e1db0796259
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1256
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Switch to use manual PNOR images in simics
Provided method for VPO to override
Change-Id: I18195b645053f1ce90b4322ae2e09b6b08844331
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1241
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
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- Handle Venice, Murano, Tuleta
- Change SPD code to use VPD_REC_NUM attribute
- Modify FAPI/HWPF tests to use present DIMM targets
Change-Id: I2348a2da90ea85a966f3724f8b3694a0b8f03916
RTC: 40774
Depends-on: I7d1b41c9f9e87baa9d42b78bf4351e3b6d774cb5 RTC: 39133
Depends-on: Ia0f22c87f8bc3959324fa8347e191f2b47b4325c RTC: 35835
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/950
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I8f7e5e3a85dd8ffc39b1970cd78ed2c925608d3d
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1205
Tested-by: Jenkins Server
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Replaced 'cpfiles' with a set of makefiles that does all
of the old function and also allows more complex behaviors
such as creating a TAR file of all our common code.
Moved the delivery location of our content into a simics sandbox
to match the locations in an FSP build. Updated debug tools
to handle living in a different location.
Removed 'post_model_hook.simics' and replaced with the
{startup,standalone,combined}.simics files.
Updated various scripts that were calling 'cpfiles' to instead
call 'hbDistribute' (which in turn calls the makefiles).
RTC: 41640
Change-Id: I10d1782ae89a397725e880c44ba44d01b0e4b011
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1173
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I19e5c373713b6e8b12386266c5c2c3a015068d5a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1132
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Tweaked our various scripts to put the hostboot images in
$sb/../images/ppc/lab/flash as that is where simics
looks for them now.
Change-Id: I3b019a460a6f5f03ad666d93724ec1d6fe1ff3c9
RTC: 35728
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1095
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Updating the Simics level to get FSI fixes to allow multiple
chips to work. This also allows us to remove some previous
workarounds.
The new Simics build pulled in a different PNOR so needed to
disable some of the tests.
The new Simics build also modified some of the L3 objects so
changes were required to some debug tools.
Had to update the VENICE config since Ched rewired it to look
like MURANO/Tuleta.
Testing:
Verified 2-proc, 4-centaur MURANO config
Verified 2-proc, 4-centaur VENICE config
Change-Id: I6aaaf8aad2f82dbfffb8ade551d545bedaa3e048
RTC: 41305
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1066
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I21d95952e526e3ade6399c2f7e022e0897ae4610
RTC: 38308
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/959
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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