Base kernel changes for Nimbus/Cumulus

Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7
RTC: 126637
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321
Tested-by: Jenkins Server
Reviewed-by: Christian Geddes <crgeddes@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 87 insertions, 62 deletions

diff --git a/src/build/simics/hb-simdebug.py b/src/build/simics/hb-simdebug.py
index 74347e8a0..fedb0780f 100755
--- a/src/build/simics/hb-simdebug.py
+++ b/src/build/simics/hb-simdebug.py
@@ -5,7 +5,9 @@
 #
 # OpenPOWER HostBoot Project
 #
-# COPYRIGHT International Business Machines Corp. 2011,2014
+# Contributors Listed Below - COPYRIGHT 2011,2015
+# [+] International Business Machines Corp.
+#
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -197,7 +199,7 @@ def hb_get_objects_by_class(classname):
 
 def hb_getallregs(regname):
     proc_list=[]
-    proc_list=hb_get_objects_by_class("ppc-power8-mambo-core")
+    proc_list=hb_get_objects_by_class("ppc-power9-mambo-core")
     for proc in proc_list:
         output = run_command("%s.read-reg %s"%(proc.name,regname))
         print ">> %s : " %(proc.name) + "%x" %output
diff --git a/src/build/simics/standalone.simics b/src/build/simics/standalone.simics
index a992bca92..15b4ad6ac 100755
--- a/src/build/simics/standalone.simics
+++ b/src/build/simics/standalone.simics
@@ -4,63 +4,84 @@
 
 ($hb_masterproc).proc_fsi2host_mbox->responder_enable=1
 
+# @todo-RTC:127341 Standalaone VPD support
 # Preload VPD in PNOR
-foreach $pnor in (get-object-list Lpc2SpiFpgaCmp) {
-    try {
-        run-python-file (lookup-file hbfw/hb-pnor-vpd-preload.py)
-            ($pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x1C5000
-            ($pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x17D000
-            ($pnor).sfc_master_mem.load-file ./syscvpd.dat.ecc 0x255000
-    } except { echo "ERROR: Failed to preload VPD into PNOR." }
-}
+#foreach $pnor in (get-object-list Lpc2SpiFpgaCmp) {
+#    try {
+#        run-python-file (lookup-file hbfw/hb-pnor-vpd-preload.py)
+#            ($pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x1C5000
+#            ($pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x17D000
+#            ($pnor).sfc_master_mem.load-file ./syscvpd.dat.ecc 0x255000
+#    } except { echo "ERROR: Failed to preload VPD into PNOR." }
+#}
 
+# Uncomment when PNOR is supported
+# @todo-RTC:130182 Enable PNOR access
 #Write the PNOR MMIO addr into Scratch 2, 0x283A
 #($hb_masterproc).proc_lbus_map.write 0x28e8 0xFFF78000  #HB PNOR addr
-foreach $cc in (get-object-list p8_proc) {
-    ($cc).proc_lbus_map.write 0x28e8 0xFFF78000
-}
+#foreach $cc in (get-object-list p9_proc) {
+#    ($cc).proc_lbus_map.write 0x28e8 0xFFF78000
+#}
 
 # Loop through every processor chip
-foreach $cc in (get-object-list p8_proc) {
+foreach $cc in (get-object-list p9_proc) {
     echo $cc
 
     #Trigger a power on to cec-chip
-    echo "-Trigger power on"
+    #echo "-Trigger power on"
     @mp="%s.proc_chip"%simenv.cc
-    @SIM_get_interface(SIM_get_object(mp),"signal").signal_raise(SIM_get_object(mp))
+    @SIM_get_interface(SIM_get_object(mp),"signal").signal_raise()
 
+    # @todo-RTC:130184 Add real SBE behavior
     #Trigger the flush, load, and SBE start
-    echo "-Trigger SBE"
-    ($cc).proc_lbus_map.write 0x28E0 0x0000F3FF  #NonFunc EX (only 4,5 is good)
-    ($cc).proc_lbus_map.write 0x2848 0x00000FFF  #GP3 0x2812 (flush)
-    ($cc).proc_lbus_map.write 0x2870 0xB0000000  #SBE Vital 0x281C (load)
-    ($cc).proc_lbus_map.write 0x2870 0x30000000  #SBE Vital 0x281C (start)
+    #echo "-Trigger SBE"
+    #($cc).proc_lbus_map.write 0x28E0 0x0000F3FF  #NonFunc EX (only 4,5 is good)
+    #($cc).proc_lbus_map.write 0x2848 0x00000FFF  #GP3 0x2812 (flush)
+    #($cc).proc_lbus_map.write 0x2870 0xB0000000  #SBE Vital 0x281C (load)
+    #($cc).proc_lbus_map.write 0x2870 0x30000000  #SBE Vital 0x281C (start)
+    # workaround to trigger sbe start
+    ($cc).proc_chip.invoke parallel_store STARTSBEREGS 0 "80000000" 32
 }
 
+# Workaround to load hb image into memory
+# @todo-RTC:130182 Remove when PNOR access enabled
+system_cmp0.phys_mem.load-file $hb_script_location+"/hbicore.bin" 0x0
+
+# Workaround to set the sim_ctrl1 reg to enable the
+# old HPT SDR1 translation, not the new PTCR translation
+# SIM_CTRL1_P9_SDR1    0x0010000000000000
+# @todo-RTC:126640  Remove with P9 page table support
+system_cmp0.cpu0_0_00_0.write-reg sim_ctrl1 0x4230000000000000
+
+# Workaround to set the hrmor
+# @todo-RTC:130184 Remove with real SBE behavior
+system_cmp0.cpu0_0_00_0.write-reg hrmor 0x0000008000000
+
+# @todo-RTC:130182 Update when PNOR is supported
 ###################################
 #Configure SFC (mimmic FSP Setup)
 ###################################
-echo "Configure SFC"
-
-foreach $pnor in (get-object-list Lpc2SpiFpgaCmp) {
-    echo $pnor
-    #Direct Read window config
-    ($pnor).sfc_master->regs_OADRNB = 0xC000000
-    ($pnor).sfc_master->regs_ADRCBF = 0x0
-    ($pnor).sfc_master->regs_ADRCMF = 0xF
-
-    #Direct Access Cache Disable
-    ($pnor).sfc_master->regs_CONF = 0x00000002
-
-    #Small Erase op code
-    ($pnor).sfc_master->regs_CONF4 = 0x00000020
-    #Erase Size
-    ($pnor).sfc_master->regs_CONF5 = 0x1000
-
-    #Enable 4 byte address mode - must write via memory to trigger
-    #model behavior
-    ($pnor).fsi_local_lbus_map.write 0xC40 0x00006E00
-}
+#echo "Configure SFC"
+
+#foreach $pnor in (get-object-list Lpc2SpiFpgaCmp) {
+#    echo $pnor
+#    #Direct Read window config
+#    ($pnor).sfc_master->regs_OADRNB = 0xC000000
+#    ($pnor).sfc_master->regs_ADRCBF = 0x0
+#    ($pnor).sfc_master->regs_ADRCMF = 0xF
+
+#    #Direct Access Cache Disable
+#    ($pnor).sfc_master->regs_CONF = 0x00000002
+
+#    #Small Erase op code
+#    ($pnor).sfc_master->regs_CONF4 = 0x00000020
+#    #Erase Size
+#    ($pnor).sfc_master->regs_CONF5 = 0x1000
+
+#    #Enable 4 byte address mode - must write via memory to trigger
+#    #model behavior
+#    ($pnor).fsi_local_lbus_map.write 0xC40 0x00006E00
+#}
 
 ###################################
 #Enable the IPMI Responder
diff --git a/src/build/simics/startup.simics b/src/build/simics/startup.simics
index bd7db5b3d..794530703 100755
--- a/src/build/simics/startup.simics
+++ b/src/build/simics/startup.simics
@@ -3,7 +3,7 @@ $hb_startup_path = (lookup-file hbfw/startup.simics)
 $hb_script_location = (python "''.join(map('/'.__add__,\""+$hb_startup_path+"\"[1:].split('/')[0:-1]))")
 python "os.environ['HB_TOOLPATH'] = \""+$hb_script_location+"\""
 
-$hb_machine = (shell "env | grep 'GFW_P8_.*_PROC_EC' | sed 's/GFW_P8_\\(.*\\)_PROC_EC.*/\\1/'")
+$hb_machine = (shell "env | grep 'GFW_P9_.*_PROC_EC' | sed 's/GFW_P9_\\(.*\\)_PROC_EC.*/\\1/'")
 $hb_machine = (python "\""+$hb_machine+"\".lower()")
 python "os.environ['HB_MACHINE'] = \""+$hb_machine+"\""
 
@@ -13,31 +13,33 @@ $hb_masterproc = ""
 @simenv.hb_masterproc = quiet_run_command("get-master-proc")[0]
 echo "Master Proc is: "+$hb_masterproc
 
-$hb_pnor = ""
-@simenv.hb_pnor = quiet_run_command("get-master-pnor")[0]
-try {
-    @SIM_get_object(simenv.hb_pnor[0])
-} except {
-    try {
-        # Attempt to use the Brazos name
-        @SIM_get_object("cecdrawer0_fpga0")
-        $hb_pnor = "cecdrawer0_fpga0"
-    } except {
-        # Default to Tuleta/Orlena name
-        $hb_pnor = "fpga0"
-    }
-}
-echo "Master PNOR is: "+$hb_pnor
+# Uncomment when PNOR is supported
+# @todo-RTC:130182 Enable PNOR access
+#$hb_pnor = ""
+#@simenv.hb_pnor = quiet_run_command("get-master-pnor")[0]
+#try {
+#    @SIM_get_object(simenv.hb_pnor[0])
+#} except {
+#    try {
+#        # Attempt to use the Brazos name
+#        @SIM_get_object("cecdrawer0_fpga0")
+#        $hb_pnor = "cecdrawer0_fpga0"
+#    } except {
+#        # Default to Tuleta/Orlena name
+#        $hb_pnor = "fpga0"
+#    }
+#}
+#echo "Master PNOR is: "+$hb_pnor
 
 # Choose a default core to start with
-$hb_cpu = "system_cmp0.cpu0_0_04_0"
+$hb_cpu = "system_cmp0.cpu0_0_00_0"
 echo "Defaulting to CPU "+$hb_cpu+" for Hostboot tools"
 
 # Prevent SBE Updates from happening on an IPL
 echo "Altering SBE SEEPROM Versions to disable Update in IPL"
-foreach $cc in (get-object-list p8_proc) {
-    ($cc).procSBEPrimary_eeprom_image.set 0x300 0x5A5A5A5A 8 -l
-    ($cc).procSBEBackup_eeprom_image.set  0x300 0x5A5A5A5A 8 -l
+foreach $cc in (get-object-list p9_proc) {
+    ($cc).procSBE0Primary_eeprom_image.set 0x300 0x5A5A5A5A 8 -l
+    ($cc).procSBE0Backup_eeprom_image.set  0x300 0x5A5A5A5A 8 -l
 }
 
 # Load HB debug tools.