Load Hostboot Base from PNOR

Add the SBE and secureboot header to the hostboot base image
and enable simics to actually pull the image from PNOR
instead of directly stuffing cache from file.  Also enables
Hostboot to execute from HRMOR of 128MB and updates cit
script to handle HRMOR

Change-Id: Ie414a5f8e43dadf03538d7435f742b2d79db431b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2473
Tested-by: Jenkins Server
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>

2 files changed, 11 insertions, 2 deletions

diff --git a/src/build/simics/combined.simics b/src/build/simics/combined.simics
index 9e66a731a..fdac091f9 100755
--- a/src/build/simics/combined.simics
+++ b/src/build/simics/combined.simics
@@ -26,3 +26,10 @@ try {
 try {
     fpga0.sfc_master->state_three_bytes=0
 } except { echo "ERROR: Failed to run 4-byte PNOR address workaround in combined.simics." }
+
+# Manually set HB location till HWSV RTC 48188 is done
+try {
+    p8Proc0.proc_lbus_map.write 0x28e8 0xFFEF0000
+} except { echo "ERROR: Failed to set HB MMIO location workaround in combined.simics." }
+
+
diff --git a/src/build/simics/standalone.simics b/src/build/simics/standalone.simics
index 7d6874cd9..530ef1ad9 100755
--- a/src/build/simics/standalone.simics
+++ b/src/build/simics/standalone.simics
@@ -1,5 +1,7 @@
 p8Proc0.proc_fsi2host_mbox->responder_enable=1
 
-#Trigger the SBE start 
-p8Proc0.proc_lbus_map.write 0x2870 0x50000000  #SBE Vital 0x281C
+#Write the PNOR MMIO addr into Scratch 2, 0x283A 
+#Then trigger the SBE start 
+p8Proc0.proc_lbus_map.write 0x28e8 0xFFEF0000 
+p8Proc0.proc_lbus_map.write 0x2870 0x10000000  #SBE Vital 0x281C 
 p8Proc0.proc_lbus_map.write 0x2870 0x90000000  #SBE Vital 0x281C